適用於公開取用強制性政策的文章 - Mahendra Sakare瞭解詳情
未在任何資料庫公開的文章：7
Bandwidth enhancement of flip-flops using feedback for high-speed integrated circuits
M Sakare, SP Kumar, S Gupta
IEEE Transactions on Circuits and Systems II: Express Briefs 63 (8), 768-772, 2016
授權規定： Danish Council for Independent Research
Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons
SK Vohra, SA Thomas, M Sakare, DM Das
Integration 95, 102122, 2024
授權規定： Department of Science & Technology, India
A Noise and Mismatch Improved Charge Pump for PLL in 28nm CMOS Technology
H Mehra, MK Singh, ZR Sheikh, R Nagulapalli, M Sakare
2024 International Conference on Integrated Circuits, Communication, and …, 2024
授權規定： Department of Science & Technology, India
A Linearity Improved Equalizers for Short-Channel Communication Links
P Singh, R Walia, R Nagulapalli, M Sakare
2024 35th Irish Signals and Systems Conference (ISSC), 1-5, 2024
授權規定： Department of Science & Technology, India
SpiMAM: CMOS Implementation of Bio-Inspired Spiking Multidirectional Associative Memory Featuring In-Situ Learning
SK Vohra, M Sakare, AP James, DM Das
IEEE Transactions on Circuits and Systems I: Regular Papers, 2024
授權規定： Department of Science & Technology, India
A 5.4 mW 12GHz Quadrature VCO using current reusing technique in 28nm CMOS technology
ZR Sheikh, T Kaur, R Nagulapalli, H Shrimali, M Sakare
2024 15th International Conference on Computing Communication and Networking …, 2024
授權規定： Department of Science & Technology, India
Full CMOS Analog Circuit Implementation of Multi-Functional Pavlov Associative Memory using STDP Learning
SK Vohra, M Sakare, DM Das
2023 IEEE Women in Technology Conference (WINTECHCON), 1-6, 2023
授權規定： Department of Science & Technology, India
在某個資料庫公開的文章：4
Full CMOS circuit for brain-inspired associative memory with on-chip trainable memristive STDP synapse
SK Vohra, SA Thomas, M Sakare, DM Das
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (7), 993 …, 2023
授權規定： Department of Science & Technology, India
A double cross-coupled delay cell for high-frequency differential ring vcos
MK Singh, MK Gautam, P Singh, R Nagulapalli, DM Das, M Sakare
2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 1-5, 2023
授權規定： Department of Science & Technology, India
A PRBS Generator using Merged XOR-D Flip-flop as Building Blocks
MK Singh, P Singh, U Chichhula, H Mehra, DM Das, M Sakare
Circuits, Systems, and Signal Processing 42 (11), 6813-6828, 2023
授權規定： Department of Science & Technology, India
An RC-Based Dual Injection Locked Delay Cell for High-Frequency Ring VCOs
MK Singh, R Nagulapalli, DM Das, M Sakare
2024 35th Irish Signals and Systems Conference (ISSC), 1-6, 2024
授權規定： Department of Science & Technology, India
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