Integrating algorithmic parameters into benchmarking and design space exploration in 3D scene understanding B Bodin, L Nardi, MZ Zia, H Wagstaff, G Sreekar Shenoy, M Emani, ... Proceedings of the 2016 International Conference on Parallel Architectures …, 2016 | 63 | 2016 |
A performance and area efficient architecture for intrusion detection systems GS Shenoy, J Tubella, A Gonz 2011 IEEE International Parallel & Distributed Processing Symposium, 301-310, 2011 | 12 | 2011 |
Improving the resilience of an IDS against performance throttling attacks GS Shenoy, J Tubella, A González International Conference on Security and Privacy in Communication Systems …, 2012 | 10 | 2012 |
Improving the performance efficiency of an ids by exploiting temporal locality in network traffic GS Shenoy, J Tubella, A Gonz'lez 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation …, 2012 | 9 | 2012 |
Hardware/software mechanisms for protecting an IDS against algorithmic complexity attacks GS Shenoy, J Tubella, A Gonz'lez 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 7 | 2012 |
Exploiting temporal locality in network traffic using commodity multi-cores GS Shenoy, J Tubella, A González 2012 IEEE International Symposium on Performance Analysis of Systems …, 2012 | 6 | 2012 |
Architecture support for intrusion detection systems G Sreekar Shenoy Universitat Politècnica de Catalunya, 2012 | | 2012 |
Architecture support for intrusion detection systems GS Shenoy Universitat Politècnica de Catalunya (UPC), 2012 | | 2012 |
Integrating Algorithmic Parameters into Benchmarking and Design Space Exploration in 3D Scene Understanding PREPRINT B Bodin, L Nardi, MZ Zia, H Wagstaff, GS Shenoy, M Emani, J Mawer, ... | | |