| Logic Minimization Algorithms for VLSI Synthesis RK Brayton Springer, 1984 | 2726 | 1984 |
| Algebric decision diagrams and their applications RI Bahar, EA Frohm, CM Gaona, GD Hachtel, E Macii, A Pardo, ... Formal methods in system design 10, 171-206, 1997 | 1192 | 1997 |
| VIS: A system for verification and synthesis RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ... Computer Aided Verification: 8th International Conference, CAV'96 New …, 1996 | 977 | 1996 |
| Logic synthesis and verification algorithms GD Hachtel, F Somenzi Springer Science & Business Media, 2005 | 803 | 2005 |
| Multilevel logic synthesis RK Brayton, GD Hachtel, AL Sangiovanni-Vincentelli Proceedings of the IEEE 78 (2), 264-300, 1990 | 636 | 1990 |
| The sparse tableau approach to network analysis and design G Hachtel, R Brayton, F Gustavson IEEE Transactions on circuit theory 18 (1), 101-113, 1971 | 513 | 1971 |
| A survey of optimization techniques for integrated-circuit design RK Brayton, GD Hachtel, AL Sangiovanni-Vincentelli Proceedings of the IEEE 69 (10), 1334-1362, 1981 | 399 | 1981 |
| A new efficient algorithm for solving differential-algebraic systems using implicit backward differentiation formulas RK Brayton, FG Gustavson, GD Hachtel Proceedings of the IEEE 60 (1), 98-108, 1972 | 386 | 1972 |
| Multi-level logic minimization using implicit don't cares KA Bartlett, RK Brayton, GD Hachtel, RM Jacoby, CR Morrison, RL Rudell, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1988 | 348 | 1988 |
| The simplicial approximation approach to design centering S Director, G Hachtel IEEE Transactions on Circuits and Systems 24 (7), 363-372, 1977 | 306 | 1977 |
| A new algorithm for statistical circuit design based on quasi-newton methods and function splitting R Brayton, S Director, G Hachtel, L Vidigal IEEE Transactions on Circuits and Systems 26 (9), 784-794, 1979 | 293 | 1979 |
| Markovian analysis of large finite state machines GD Hachtel, E Macii, A Pardo, F Somenzi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996 | 200 | 1996 |
| SOCRATES: A system for automatically synthesizing and optimizing combinational logic D Gregory, K Bartlett, A deGeus, G Hachtel Papers on Twenty-five years of electronic design automation, 580-586, 1988 | 191 | 1988 |
| An algorithm for optimal PLA folding GD Hachtel, AR Newton, AL Sangiovanni-Vincentelli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1982 | 168 | 1982 |
| Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration H Cho, GD Hachtel, F Somenzi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1993 | 156 | 1993 |
| ATPG aspects of FSM verification G Hachtel, H Cho, SW Jeong, B Plessier, E Schwarz, F Somenzi Proceeding of the International Conference on Computer-Aided Design, 134-137, 1990 | 154 | 1990 |
| Synthesis and optimization of multilevel logic under timing constraints K Bartlett, W Cohen, A De Geus, G Hachtel IEEE Transactions on Computer-aided design 5 (4), 582-595, 1986 | 135 | 1986 |
| A survey of third-generation simulation techniques GD Hachtel, AL Sangiovanni-Vincentelli Proceedings of the IEEE 69 (10), 1264-1280, 1981 | 128 | 1981 |
| Re-encoding sequential circuits to reduce power dissipation GD Hachtel, M Hermida, A Pardo, M Poncino, F Somenzi IEEE/ACM International Conference on Computer-Aided Design, 70, 71, 72, 73 …, 1994 | 127 | 1994 |
| Algorithms for approximate FSM traversal H Cho, GD Hachtel, E Macii, B Plessier, F Somenzi Proceedings of the 30th International Design Automation Conference, 25-30, 1993 | 123 | 1993 |
