| Variability Driven Gate Sizing for Binning Yield Optimization A Davoodi, A Srivastava Design Automation Conference, 959-964, 2006 | 90 | 2006 |
| GRIP: Scalable 3D global routing using integer programming TH Wu, A Davoodi, JT Linderoth Proceedings of the 46th Annual Design Automation Conference, 320-325, 2009 | 79 | 2009 |
| A hybrid approach for fast and accurate trace signal selection for post-silicon debug M Li, A Davoodi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 73 | 2014 |
| Are proximity attacks a threat to the security of split manufacturing of integrated circuits? J Magaña, D Shi, J Melchert, A Davoodi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (12 …, 2017 | 59 | 2017 |
| A parallel integer programming approach to global routing TH Wu, A Davoodi, JT Linderoth Proceedings of the 47th Design Automation Conference, 194-199, 2010 | 58 | 2010 |
| A sensor-assisted self-authentication framework for hardware Trojan detection M Li, A Davoodi, M Tehranipoor 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 52 | 2012 |
| GRIP: Global routing via integer programming TH Wu, A Davoodi, JT Linderoth Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2011 | 52 | 2011 |
| Congestion analysis for global routing via integer programming H Shojaei, A Davoodi, JT Linderoth Proceedings of the International Conference on Computer-Aided Design, 256-262, 2011 | 51 | 2011 |
| A fast and scalable multidimensional multiple-choice knapsack heuristic H Shojaei, T Basten, M Geilen, A Davoodi ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4 …, 2013 | 47 | 2013 |
| PaRS: Parallel and near-optimal grid-based cell sizing for library-based design TH Wu, A Davoodi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 45* | 2009 |
| A probabilistic approach to buffer insertion V Khandelwal, A Davoodi, A Nanavati, A Srivastava ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003 | 45 | 2003 |
| Representative path selection for post-silicon timing prediction under variability L Xie, A Davoodi Proceedings of the 47th Design Automation Conference, 386-391, 2010 | 42 | 2010 |
| Trapl: Track planning of local congestion for global routing D Shi, A Davoodi Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 41* | 2017 |
| FPGA dynamic power minimization through placement and routing constraints L Wang, M French, A Davoodi, D Agarwal EURASIP Journal on Embedded Systems 2006, 1-10, 2006 | 40 | 2006 |
| Logic synthesis meets machine learning: Trading exactness for generalization S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ... 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 38 | 2021 |
| Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations L Xie, A Davoodi, KK Saluja Proceedings of the 47th Design Automation Conference, 274-279, 2010 | 38* | 2010 |
| Explainable DRC hotspot prediction with random forest and SHAP tree explainer W Zeng, A Davoodi, RO Topaloglu 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 37* | 2020 |
| Trace signal selection to enhance timing and logic visibility in post-silicon validation H Shojaei, A Davoodi 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 168-172, 2010 | 37 | 2010 |
| Exploring energy and accuracy tradeoff in structure simplification of trained deep neural networks B Zhang, A Davoodi, YH Hu IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018 | 34 | 2018 |
| Bound-based statistically-critical path extraction under process variations L Xie, A Davoodi Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2011 | 34* | 2011 |
Lin XieUniversity of Wisconsin-Madison在 insiemenetworks.com 的电子邮件经过验证