| Architecting Phase Change Memory as a Scalable DRAM Alternative BC Lee, E Ipek, O Mutlu, D Burger ISCA 37 (3), 2-13, 2009 | 1908 | 2009 |
| Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors Y Kim, R Daly, J Kim, C Fallin, JH Lee, D Lee, C Wilkerson, K Lai, O Mutlu ISCA 2014 42 (3), 361-372, 2014 | 1624 | 2014 |
| A scalable processing-in-memory accelerator for parallel graph processing J Ahn, S Hong, S Yoo, O Mutlu, K Choi ISCA 2015 43 (3), 105-117, 2015 | 1078 | 2015 |
| Personalized copy number and segmental duplication maps using next-generation sequencing C Alkan, JM Kidd, T Marques-Bonet, G Aksay, F Antonacci, F Hormozdiari, ... Nature genetics 41 (10), 1061-1067, 2009 | 980 | 2009 |
| Ramulator: A fast and extensible DRAM simulator Y Kim, W Yang, O Mutlu IEEE Computer architecture letters 15 (1), 45-49, 2015 | 849 | 2015 |
| Parallelism-aware batch scheduling: Enhancing both performance and fairness of shared DRAM systems O Mutlu, T Moscibroda ISCA 2008, 2008 | 768 | 2008 |
| Stall-time fair memory access scheduling for chip multiprocessors O Mutlu, T Moscibroda MICRO 2007, 2007 | 718 | 2007 |
| Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology V Seshadri, D Lee, T Mullins, H Hassan, A Boroumand, J Kim, MA Kozuch, ... Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 681 | 2017 |
| The non-iid data quagmire of decentralized machine learning K Hsieh, A Phanishayee, O Mutlu, P Gibbons International Conference on Machine Learning, 4387-4398, 2020 | 678 | 2020 |
| RAIDR: Retention-aware intelligent DRAM refresh J Liu, B Jaiyen, R Veras, O Mutlu ISCA 2012, 2012 | 678 | 2012 |
| Self-optimizing memory controllers: A reinforcement learning approach E Ipek, O Mutlu, JF Martínez, R Caruana ISCA 2008 36 (3), 39-50, 2008 | 656 | 2008 |
| PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture J Ahn, S Yoo, O Mutlu, K Choi ISCA 2015 43 (3S), 336-348, 2015 | 650 | 2015 |
| Evaluating STT-RAM as an energy-efficient main memory alternative E Kültürsay, M Kandemir, A Sivasubramaniam, O Mutlu 2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013 | 637 | 2013 |
| Runahead execution: An alternative to very large instruction windows for out-of-order processors O Mutlu, J Stark, C Wilkerson, YN Patt The Ninth International Symposium on High-Performance Computer Architecture …, 2003 | 629 | 2003 |
| Phase-change technology and the future of main memory BC Lee, P Zhou, J Yang, Y Zhang, B Zhao, E Ipek, O Mutlu, D Burger IEEE Micro, 2010 | 596 | 2010 |
| ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers Y Kim, D Han, O Mutlu, M Harchol-Balter HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010 | 578 | 2010 |
| Thread cluster memory scheduling: Exploiting differences in memory access behavior Y Kim, M Papamichael, O Mutlu, M Harchol-Balter MICRO 2010, 65-76, 2010 | 568 | 2010 |
| Improving GPU performance via large warps and two-level warp scheduling V Narasiman, M Shebanow, CJ Lee, R Miftakhutdinov, O Mutlu, YN Patt Proceedings of the 44th Annual IEEE/ACM International Symposium on …, 2011 | 567 | 2011 |
| A case for bufferless routing in on-chip networks T Moscibroda, O Mutlu ISCA 2009 37 (3), 196-207, 2009 | 564 | 2009 |
| Gaia: Geo-Distributed Machine Learning Approaching LAN Speeds K Hsieh, A Harlap, N Vijaykumar, D Konomis, GR Ganger, PB Gibbons, ... 14th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2017 | 553 | 2017 |
Saugata GhoseUniversity of Illinois Urbana-ChampaignEmail được xác minh tại illinois.edu
