| Digital system design with VHDL M Zwoliński Pearson education, 2004 | 255 | 2004 |
| VLSI circuit simulation and optimization V Litovski, M Zwolinski Springer Science & Business Media, 1996 | 201 | 1996 |
| A beginning in the reversible logic synthesis of sequential circuits H Thapliyal, MB Srinivas, M Zwolinski | 164 | 2005 |
| Overview of PUF-based hardware security solutions for the Internet of Things B Halak, M Zwolinski, MS Mispan 2016 IEEE 59th International Midwest Symposium on Circuits and Systems …, 2016 | 136 | 2016 |
| Mutual information theory for adaptive mixture models ZR Yang, M Zwolinski IEEE Transactions on Pattern Analysis and Machine Intelligence 23 (4), 396-403, 2001 | 108 | 2001 |
| Evaluation of dynamic voltage and frequency scaling as a differential power analysis countermeasure K Baddam, M Zwolinski 20th International Conference on VLSI Design held jointly with 6th …, 2007 | 104 | 2007 |
| Overview of SP ICE4 i ke ci rcu it simulation algorithms KG Nichols, TJ Kazmierski, M Zwolinski, AD Brown IEEE Proc. On Circuits Devices Syst 141 (4), 1994 | 83 | 1994 |
| Reversible logic to cryptographic hardware: a new paradigm H Thapliyal, M Zwolinski 2006 49th IEEE International Midwest Symposium on Circuits and Systems 1 …, 2006 | 74 | 2006 |
| Applying a robust heteroscedastic probabilistic neural network to analog fault detection and classification ZR Yang, M Zwolinski, CD Chalk, AC Williams IEEE Transactions on computer-aided design of integrated circuits and …, 2000 | 70 | 2000 |
| Simultaneous optimisation of dynamic power, area and delay in behavioural synthesis AC Williams, AD Brown, M Zwolinski IEE Proceedings-Computers and Digital Techniques 147 (6), 383-390, 2000 | 59 | 2000 |
| Analogue electronic circuit diagnosis based on ANNs V Litovski, M Andrejević, M Zwolinski Microelectronics Reliability 46 (8), 1382-1391, 2006 | 54 | 2006 |
| Analytical transient response and propagation delay model for nanoscale CMOS inverter Y Wang, M Zwolinski 2009 IEEE International Symposium on Circuits and Systems, 2998-3001, 2009 | 53 | 2009 |
| Dynamic voltage scaling aware delay fault testing NBZ Ali, M Zwolinski, BM Al-Hashimi, P Harrod Eleventh IEEE European Test Symposium (ETS'06), 15-20, 2006 | 45 | 2006 |
| Divided backend duplication methodology for balanced dual rail routing K Baddam, M Zwolinski Cryptographic Hardware and Embedded Systems–CHES 2008: 10th International …, 2008 | 40 | 2008 |
| TCO-PUF: A subthreshold physical unclonable function MS Mispan, B Halak, Z Chen, M Zwolinski 2015 11th Conference on Ph. D. Research in Microelectronics and Electronics …, 2015 | 37 | 2015 |
| Testing analog circuits by supply voltage variation and supply current monitoring Y Kilic, M Zwolinski Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No …, 1999 | 37 | 1999 |
| Parallel sparse matrix solution for circuit simulation on FPGAs T Nechma, M Zwolinski IEEE transactions on computers 64 (4), 1090-1103, 2014 | 34 | 2014 |
| Fault modeling and simulation using VHDL-AMS AJ Perkins, M Zwolinski, CD Chalk, BR Wilkins Analog VHDL, 53-67, 1998 | 34 | 1998 |
| Generation and verification of tests for analogue circuits subject to process parameter deviations SJ Spinks, CD Chalk, IM Bell, M Zwolinski 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 1997 | 34 | 1997 |
| Cost-efficient design for modeling attacks resistant PUFs MS Mispan, H Su, M Zwolinski, B Halak 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 467-472, 2018 | 32 | 2018 |
