Theo dõi
Seojin Choi
Tiêu đề
Trích dẫn bởi
Trích dẫn bởi
Năm
A PVT-robust and low-jitter ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector
S Choi, S Yoo, Y Lim, J Choi
IEEE Journal of Solid-State Circuits 51 (8), 1878-1889, 2016
842016
A low-integrated-phase-noise 27–30-GHz injection-locked frequency multiplier with an ultra-low-power frequency-tracking loop for mm-wave-band 5G transceivers
S Yoo, S Choi, J Kim, H Yoon, Y Lee, J Choi
IEEE Journal of Solid-State Circuits 53 (2), 375-388, 2017
692017
10.7 A 185fsrms-integrated-jitter and− 245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay …
S Choi, S Yoo, J Choi
2016 IEEE International Solid-State Circuits Conference (ISSCC), 194-195, 2016
532016
A low-jitter and fractional-resolution injection-locked clock multiplier using a DLL-based real-time PVT calibrator with replica-delay cells
M Kim, S Choi, T Seong, J Choi
IEEE Journal of Solid-State Circuits 51 (2), 401-411, 2015
502015
19.2 A PVT-robust− 39dBc 1kHz-to-100MHz integrated-phase-noise 29GHz injection-locked frequency multiplier with a 600µW frequency-tracking loop using the averages of phase …
S Yoo, S Choi, J Kim, H Yoon, Y Lee, J Choi
2017 IEEE International Solid-State Circuits Conference (ISSCC), 324-325, 2017
372017
30.9 A 140fsrms-Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope …
S Yoo, S Choi, Y Lee, T Seong, Y Lim, J Choi
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 490-492, 2019
232019
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator
S Yoo, S Choi, Y Lee, T Seong, Y Lim, J Choi
IEEE Journal of Solid-State Circuits, 2020
222020
A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells
M Kim, S Choi, J Choi
2015 Symposium on VLSI Circuits (VLSI Circuits), C142-C143, 2015
182015
An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114
S Choi, S Yoo, Y Lee, Y Jo, J Lee, Y Lim, J Choi
IEEE Journal of Solid-State Circuits 54 (4), 927-936, 2018
152018
Linearly frequency-tunable and low-phase noise ring VCO using varactors with optimally-spaced bias voltages
J Lee, S Choi, Y Cho, J Choi
Electronics Letters 54 (6), 342-344, 2018
112018
153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier
S Choi, S Yoo, Y Lee, Y Jo, J Lee, Y Lim, J Choi
2018 IEEE Symposium on VLSI Circuits, 185-186, 2018
42018
An Ultra-Low Power and Compact -Tank-Based Frequency Tripler Using Pulsed Input Signals
S Yoo, S Choi, T Seong, J Choi
IEEE Microwave and Wireless Components Letters 26 (2), 140-142, 2016
32016
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