| A low power reconfigurable LFSR L Shaer, T Sakakini, R Kanj, A Chehab, A Kayssi Electrotechnical Conference (MELECON), 2016 18th Mediterranean, 1-4, 2016 | 20 | 2016 |
| Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs L Shaer, R Kanj, R Joshi 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 10 | 2019 |
| Low-power adder design techniques for noise-tolerant applications I Nahlus, L Shaer, A Chehab, A Kayssi, M Mansour Signal Processing Systems (SiPS), 2011 IEEE Workshop on, 117-121, 2011 | 8 | 2011 |
| Low-power digital signal processor design for a hearing aid L Shaer, I Nahlus, J Merhi, A Kayssi, A Chehab Energy Aware Computing Systems and Applications (ICEAC), 2013 4th Annual …, 2013 | 7 | 2013 |
| Regularized logistic regression for fast importance sampling based SRAM yield analysis L Shaer, R Kanj, R Joshi, M Malik, A Chehab Quality Electronic Design (ISQED), 2017 18th International Symposium on, 119-124, 2017 | 6 | 2017 |
| Fast Statistical Analysis Using Machine Learning R Kanj, RV Joshi, L Shaer, A Chehab, M Malik Machine Learning in VLSI Computer-Aided Design, 323-348, 2019 | 2 | 2019 |
