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Onur Kayiran
Onur Kayiran
AMD;AMD Research;
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Alıntı yapanlar
Alıntı yapanlar
Yıl
OWL: Cooperative thread array aware scheduling techniques for improving GPGPU performance
A Jog, O Kayiran, N Chidambaram Nachiappan, AK Mishra, MT Kandemir, ...
ACM SIGPLAN Notices 48 (4), 395-406, 2013
3892013
Neither More Nor Less: Optimizing Thread-Level Parallelism for GPGPUs
O Kayiran, A Jog, MT Kandemir, CR Das
In Proceedings of PACT-2013, 22nd International Conference on Parallel …, 2013
3452013
Orchestrated scheduling and prefetching for GPGPUs
A Jog, O Kayiran, AK Mishra, MT Kandemir, O Mutlu, R Iyer, CR Das
Proceedings of the 40th Annual International Symposium on Computer …, 2013
2612013
Scheduling techniques for GPU architectures with processing-in-memory capabilities
A Pattnaik, X Tang, A Jog, O Kayiran, AK Mishra, MT Kandemir, O Mutlu, ...
Proceedings of the 2016 International Conference on Parallel Architectures …, 2016
2512016
Managing GPU Concurrency in Heterogeneous Architectures
O Kayıran, NC Nachiappan, A Jog, R Ausavarungnirun, MT Kandemir, ...
Proceeding of The 47th Annual IEEE/ACM International Symposium on …, 2014
1792014
Modular routing design for chiplet-based systems
J Yin, Z Lin, O Kayiran, M Poremba, MSB Altaf, NE Jerger, GH Loh
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
1462018
Anatomy of gpu memory system for multi-application execution
A Jog, O Kayiran, T Kesten, A Pattnaik, E Bolotin, N Chatterjee, ...
Proceedings of the 2015 international symposium on memory systems, 223-234, 2015
1192015
Design and Analysis of an APU for Exascale Computing
T Vijayaraghavan, Y Eckert, GH Loh, MJ Schulte, M Ignatowski, ...
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
1072017
Lost in abstraction: Pitfalls of analyzing GPUs at the intermediate language level
A Gutierrez, BM Beckmann, A Dutu, J Gross, M LeBeane, J Kalamatianos, ...
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
1042018
Exploiting inter-warp heterogeneity to improve GPGPU performance
R Ausavarungnirun, S Ghose, O Kayiran, GH Loh, CR Das, MT Kandemir, ...
2015 International Conference on Parallel Architecture and Compilation (PACT …, 2015
982015
OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures
J Zhan, O Kayıran, GH Loh, CR Das, Y Xie
2016 49th annual IEEE/ACM international symposium on microarchitecture …, 2016
672016
Exploiting core criticality for enhanced GPU performance
A Jog, O Kayiran, A Pattnaik, MT Kandemir, O Mutlu, R Iyer, CR Das
Proceedings of the 2016 ACM SIGMETRICS International Conference on …, 2016
672016
Controlled kernel launch for dynamic parallelism in GPUs
X Tang, A Pattnaik, H Jiang, O Kayiran, A Jog, S Pai, M Ibrahim, ...
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
632017
Efficient and fair multi-programming in GPUs via effective bandwidth management
H Wang, F Luo, M Ibrahim, O Kayiran, A Jog
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
562018
Opportunistic computing in gpu architectures
A Pattnaik, X Tang, O Kayiran, A Jog, A Mishra, MT Kandemir, ...
Proceedings of the 46th international symposium on computer architecture …, 2019
552019
μC-States: Fine-grained GPU datapath power management
O Kayiran, A Jog, A Pattnaik, R Ausavarungnirun, X Tang, MT Kandemir, ...
Proceedings of the 2016 International Conference on Parallel Architectures …, 2016
552016
Prioritizing local and remote memory access in a non-uniform memory access architecture
MW Boyer, O Kayiran, Y Eckert, S Raasch, MSBIN ALTAF
US Patent 10,838,864, 2020
352020
Preemptive cache management policies for processing units
O Kayiran, GH Loh, Y Eckert
US Patent 10,303,602, 2019
352019
Coda: Enabling co-location of computation and data for multiple gpu systems
H Kim, R Hadidi, L Nai, H Kim, N Jayasena, Y Eckert, O Kayiran, G Loh
ACM Transactions on Architecture and Code Optimization (TACO) 15 (3), 1-23, 2018
352018
There and back again: Optimizing the interconnect in networks of memory cubes
M Poremba, I Akgun, J Yin, O Kayiran, Y Xie, GH Loh
ACM SIGARCH Computer Architecture News 45 (2), 678-690, 2017
302017
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