| Logic locking for IP security: a comprehensive analysis on challenges, techniques, and trends J Gandhi, D Shekhawat, M Santosh, JG Pandey Computers & Security 129, 103196, 2023 | 17 | 2023 |
| Modeling, hardware architecture, and performance analyses of an AEAD-based lightweight cipher K Jhawar, J Gandhi, D Shekhawat, A Upadhyay, A Harkishanka, ... Journal of Real-Time Image Processing 21 (2), 32, 2024 | 5 | 2024 |
| A time domain 2d oaa-based convolutional neural networks accelerator RP Singh, S Kumar, J Gandhi, D Shekhawat, M Santosh, JG Pandey Memories-Materials, Devices, Circuits and Systems 4, 100041, 2023 | 4 | 2023 |
| A hardware generator for posit arithmetic and its FPGA prototyping D Shekhawat, A Jangir, JG Pandey 2021 25th International Symposium on VLSI Design and Test (VDAT), 1-6, 2021 | 4 | 2021 |
| SAT and SCOPE Attacks on Deceptive Multiplexer Logic Locking J Gandhi, R Agarwal, A Mall, D Shekhawat, M Santosh, JG Pandey 2024 37th International Conference on VLSI Design and 2024 23rd …, 2024 | 2 | 2024 |
| LOKI: a secure FPGA Prototyping of IoT IP with lightweight logic locking J Gandhi, D Shekhawat, M Santosh, JG Pandey 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 85-89, 2023 | 2 | 2023 |
| LightLock: ensuring hardware IP security in IoT environment with lightweight logic locking J Gandhi, D Shekhawat, M Santosh, JG Pandey International Symposium on VLSI Design and Test, 201-214, 2023 | 2 | 2023 |
| An FPGA prototyping of the GIFT cipher for image security applications A Jangir, D Shekhawat, JG Pandey 2021 4th international conference on security and privacy (ISEA-ISAP), 1-6, 2021 | 2 | 2021 |
| GAN4IP: A unified GAN and logic locking-based pipeline for hardware IP security J Gandhi, D Shekhawat, M Santosh, JG Pandey Sādhanā 49 (2), 169, 2024 | 1 | 2024 |
| SHAKTI: Securing Hardware IPs by Cascade Gated Multiplexer-Based Logic Obfuscation J Gandhi, N Handa, A Nayak, D Shekhawat, M Santosh, J Dofe, ... 2025 38th International Conference on VLSI Design and 2024 23rd …, 2025 | | 2025 |
| Emerging Frontiers and Limitations of Logic Locking for Secure IC Design J Gandhi, D Shekhawat, M Santosh, JG Pandey 2024 IEEE 17th International Symposium on Embedded Multicore/Many-core …, 2024 | | 2024 |
| Security Evaluation of Lightweight SBoxes J Gandhi, D Shekhawat, M Santosh, JG Pandey 2023 IEEE International Symposium on Smart Electronic Systems (iSES), 315-318, 2023 | | 2023 |
| A NAND Flash Memory Controller for Energy-Constrained Edge Computing Applications D Shekhawat, J Gandhi, R Sekhar CB, M Santosh, JG Pandey International Symposium on VLSI Design and Test, 327-342, 2023 | | 2023 |
| PHAc: Posit Hardware Accelerator for Efficient Arithmetic Logic Operations D Shekhawat, J Gandhi, M Santosh, JG Pandey Conference on Next Generation Arithmetic, 88-100, 2023 | | 2023 |
| PHAc: Posit Hardware Accelerator for Efficient Arithmetic Operations D Shekhawat | | |
Jai Gopal Pandey, Ph.D.Senior Principal Scientist, CSIR– Central Electronics Engg. Research Insti (CEERI), Pilani, Indiaceeri.res.in üzerinde doğrulanmış e-posta adresine sahip