| Sources of error in full-system simulation A Gutierrez, J Pusdesris, RG Dreslinski, T Mudge, C Sudanthi, ... 2014 IEEE International Symposium on Performance Analysis of Systems and …, 2014 | 162 | 2014 |
| The arm neoverse n1 platform: Building blocks for the next-gen cloud-to-edge infrastructure soc A Pellegrini, N Stephens, M Bruce, Y Ishii, J Pusdesris, A Raja, ... IEEE Micro 40 (2), 53-62, 2020 | 81 | 2020 |
| Temporal prefetching without the off-chip metadata H Wu, K Nathella, J Pusdesris, D Sunwoo, A Jain, C Lin Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 62 | 2019 |
| Multiple stride prefetching JM Pusdesris, MR Dooley, AC Shulyak, K Nathella, D Sunwoo US Patent 10,769,070, 2020 | 31 | 2020 |
| Responding to branch misprediction for predicated-loop-terminating branch instruction JM Pusdesris, NA Plante, Y Ishii, C Abernathy US Patent 11,693,666, 2023 | 3 | 2023 |
| Memory controller having data access hint message for specifying the given range of one or more memory addresses M Filippo, J Jalal, KM Bruce, PG Meyer, DJ Hawkins, PK Mannava, ... US Patent 10,402,349, 2019 | 3 | 2019 |
| Lazy cache invalidation for self-modifying codes A Gutierrez, J Pusdesris, RG Dreslinski, T Mudge Proceedings of the 2012 international conference on Compilers, architectures …, 2012 | 2 | 2012 |
| Prefetching at dynamically determined offsets JM Pusdesris, AC Shulyak US Patent 11,416,404, 2022 | 1 | 2022 |
| Register rename stage fusing of instructions JM Pusdesris, Y Ishii, EC Quinnell, NA Plante US Patent App. 16/952,661, 2022 | 1 | 2022 |
| Writebacks of prefetched data JM Pusdesris, C Abernathy US Patent 11,204,878, 2021 | 1 | 2021 |
| Predicting a load value for a subsequent load operation AC Shulyak, Y Ishii, JM Pusdesris US Patent 12,229,556, 2025 | | 2025 |
| Methods and apparatus for transferring data within hierarchical cache circuitry JM Pusdesris, KM Bruce, J Jalal, D Kaseridis, G Ramagiri, HS Kim, ... US Patent 12,174,753, 2024 | | 2024 |
| Control flow prediction using pointers JM Pusdesris, AC Shulyak, Y Ishii, H Bouzguarrou US Patent 11,983,533, 2024 | | 2024 |
| Operation elimination NA Plante, JM Pusdesris, J Kim US Patent 11,907,723, 2024 | | 2024 |
| Faulting address prediction for prefetch target address AC Shulyak, JM Pusdesris, R Abhishek, K Sundaram, AR Iyer, ... US Patent 11,782,845, 2023 | | 2023 |
| Producer prefetch filter AC Shulyak, B Vijayan, K Sundaram, Y Ishii, JM Pusdesris US Patent 11,775,440, 2023 | | 2023 |
| Prefetching JM Pusdesris, JM DeGASPERIS, AC Shulyak US Patent 11,663,132, 2023 | | 2023 |
| Controlling access requests of request nodes HS Kim, JM Pusdesris, MR Dooley US Patent 11,543,994, 2023 | | 2023 |
| Data processing apparatus and method for generating prefetches AC Shulyak, A Montero, JM Pusdesris, K Sundaram, Y Ishii US Patent 11,442,863, 2022 | | 2022 |
| Prediction circuitry D Lafford, AC Shulyak, JM Pusdesris, JM DeGASPERIS US Patent App. 17/155,665, 2022 | | 2022 |
Trevor MudgeBredt Family Professor of Engineering, University of Michiganeecs.umich.edu üzerinde doğrulanmış e-posta adresine sahip