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Gurshaant Malik
Gurshaant Malik
Diğer adlarGurshaant Singh Malik, Gary Malik
Machine Learning Engineer, Meta
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Başlık
Alıntı yapanlar
Alıntı yapanlar
Yıl
Hardware aware training for efficient keyword spotting on general purpose and specialized hardware
P Blouw, G Malik, B Morcos, AR Voelker, C Eliasmith
arXiv preprint arXiv:2009.04465, 2020
222020
System and method for a database proxy
C Kulkarni, A Alurkar, P Mishra, P Sukumar, V Raghava, R Raj, ...
US Patent 10,237,350, 2019
192019
Enhancing butterfly fat tree nocs for fpgas with lightweight flow control
GS Malik, N Kapre
2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019
152019
Language modeling using lmus: 10x better data efficiency or improved scaling compared to transformers
N Chilkuri, E Hunsberger, A Voelker, G Malik, C Eliasmith
arXiv preprint arXiv:2110.02402, 2021
102021
Partitioning FPGA-optimized systolic arrays for fun and profit
LC Chan, G Malik, N Kapre
2019 International Conference on Field-Programmable Technology (ICFPT), 144-152, 2019
62019
FPGA based hybrid architecture for parallelizing RRT
G Malik, K Gupta, R Dharani, KM Krishna
arXiv preprint arXiv:1607.05704, 2016
52016
FPGA based hierarchical architecture for parallelizing RRT
GS Malik, K Gupta, KM Krishna, SR Chowdhury
Proceedings of the 2015 Conference on Advances in Robotics, 1-6, 2015
52015
Methods And Systems For Efficient Processing Of Recurrent Neural Networks
GS Malik, AR Voelker, CD Eliasmith
US Patent App. 17/244,797, 2021
42021
Learn the switches: Evolving FPGA NoCs with stall-free and backpressure based routers
G Malik, IE Lang, R Pellizoni, N Kapre
2020 30th International Conference on Field-Programmable Logic and …, 2020
42020
FPGA based massively parallel architectures for super fast path planning via Rapidly Exploring Random Trees (RRT)
GS Malik
Master’s Thesis, 2016
42016
FPGA based combinatorial architecture for parallelizing RRT
GS Malik, K Gupta, KM Krishna, SR Chowdhury
2015 European Conference on Mobile Robots (ECMR), 1-6, 2015
42015
HopliteML: Evolving application customized FPGA NoCs with adaptable routers and regulators
G Malik, IE Lang, R Pellizzoni, N Kapre
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15 (4), 1-33, 2022
22022
DarwiNN: efficient distributed neuroevolution under communication constraints
GS Malik, L Petrica, N Kapre, M Blott
Proceedings of the 2020 Genetic and Evolutionary Computation Conference …, 2020
22020
K-Means derived strategized placement of starting points for parallel RRT’s
KM Krishna
Proc. IIIT Hyderabad, 145, 2016
22016
Decision theoretic search for small objects through integrating far and near cues
MS Karthik, S Mittal, G Malik, KM Krishna
2015 European Conference on Mobile Robots (ECMR), 1-6, 2015
22015
GraphNoC: Graph Neural Networks for Application-Specific FPGA NoC Performance Prediction
G Malik, N Kapre
2024 International Conference on Field-Programmable Technology (ICFPT), IEEE, 2024
12024
Learning Design Parameters to Build Application Customizable Network-on-Chips for FPGAs
GS Malik
University of Waterloo, 2024
2024
System and method for a database proxy
C Kulkarni, A Alurkar, P Mishra, P Sukumar, V Raghava, R Raj, ...
US Patent 11,044,314, 2021
2021
FPGA Based Massively Parallel Hybrid Architecture for Parallelizing RRTs
GS Malik, K Gupta, R Dharani, KM Krishna
International Journal of Mechanical Engineering and Robotics Research 6 (6), 2017
2017
FPL 2020
G Malik, IE Lang, E Karabulut, A Aysu
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Makaleler 1–20