Kamu erişimi zorunlu olan makaleler - Ken MaiDaha fazla bilgi edinin
Hiçbir yerde sunulmuyor: 7
Vulnerabilities in MLC NAND flash memory programming: Experimental analysis, exploits, and mitigation techniques
Y Cai, S Ghose, Y Luo, K Mai, O Mutlu, EF Haratsch
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
Zorunlu olanlar: US National Science Foundation
A secure camouflaged logic family using post-manufacturing programming with a 3.6GHz adder prototype in 65nm CMOS at 1V nominal VDD
NEC Akkaya, B Erbagci, K Mai
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 128-130, 2018
Zorunlu olanlar: US Department of Defense
Secure chip odometers using intentional controlled aging
NEC Akkaya, B Erbagci, K Mai
2018 IEEE International Symposium on Hardware Oriented Security and Trust …, 2018
Zorunlu olanlar: US National Science Foundation
Split-chip design to prevent ip reverse engineering
S Pagliarini, J Sweeney, K Mai, S Blanton, L Pileggi, S Mitra
IEEE Design & Test 38 (4), 109-118, 2020
Zorunlu olanlar: US Department of Defense
Combatting IC counterfeiting using secure chip odometers
NEC Akkaya, B Erbagci, K Mai
2017 IEEE International Electron Devices Meeting (IEDM), 39.5. 1-39.5. 4, 2017
Zorunlu olanlar: US National Science Foundation
A compact energy-efficient pseudo-static camouflaged logic family
P Mohan, NEC Akkaya, B Erbagci, K Mai
2018 IEEE International Symposium on Hardware Oriented Security and Trust …, 2018
Zorunlu olanlar: US Department of Defense
Secure hardware-entangled field programmable gate arrays
B Erbagci, NEC Akkaya, M Bhargava, R Dondero, K Mai
Journal of Parallel and Distributed Computing 131, 81-96, 2019
Zorunlu olanlar: US National Science Foundation
Bir yerde sunuluyor: 6
Neighbor-cell assisted error correction for MLC NAND flash memories
Y Cai, G Yalcin, O Mutlu, EF Haratsch, O Unsal, A Cristal, K Mai
ACM SIGMETRICS Performance Evaluation Review 42 (1), 491-504, 2014
Zorunlu olanlar: Government of Spain
Hardware redaction via designer-directed fine-grained eFPGA insertion
P Mohan, O Atli, J Sweeney, O Kibar, L Pileggi, K Mai
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
Zorunlu olanlar: US Department of Energy, US Department of Defense
ASIC accelerator in 28 nm for the post-quantum digital signature scheme XMSS
P Mohan, W Wang, B Jungk, R Niederhagen, J Szefer, K Mai
2020 IEEE 38th International Conference on Computer Design (ICCD), 656-662, 2020
Zorunlu olanlar: US National Science Foundation, Federal Ministry of Education and Research …
Top-down physical design of soft embedded FPGA fabrics
P Mohan, O Atli, O Kibar, M Zackriya, L Pileggi, K Mai
The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021
Zorunlu olanlar: US Department of Energy, US Department of Defense
Logic locking-connecting theory and practice
E Masserova, D Garg, K Mai, L Pileggi, V Goyal, B Parno
Cryptology ePrint Archive, 2022
Zorunlu olanlar: US National Science Foundation, US Department of Defense
In Situ Observation of Circuit Behavior Using Pump-Probe Laser Voltage Probe Technique
MP King, J Beutler, N Smith, I Kohl, T Meisenheimer, AO Atli, P Mohan, ...
IEEE Transactions on Nuclear Science 71 (4), 654-662, 2024
Zorunlu olanlar: US Department of Energy
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