| A survey of power estimation techniques in VLSI circuits FN Najm IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2 (4), 446-455, 1994 | 1018 | 1994 |
| Transition density: A new measure of activity in digital circuits FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1993 | 606 | 1993 |
| A Monte Carlo approach for power estimation R Burch, FN Najm, P Yang, TN Trick IEEE Transactions on Very Large Scale Integration (VLSI) Systems 1 (1), 63-71, 1993 | 550 | 1993 |
| A gate-level leakage power reduction method for ultra-low-power CMOS circuits JP Halter, FN Najm Proceedings of CICC 97-Custom Integrated Circuits Conference, 475-478, 1997 | 391 | 1997 |
| A multigrid-like technique for power grid analysis JN Kozhaya, SR Nassif, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 354 | 2002 |
| Transition density, a stochastic measure of activity in digital circuits FN Najm Proceedings of the 28th ACM/IEEE Design Automation Conference, 644-649, 1991 | 336 | 1991 |
| Circuit simulation FN Najm John Wiley & Sons, 2010 | 320 | 2010 |
| Low-leakage asymmetric-cell SRAM N Azizi, A Moshovos, FN Najm Proceedings of the 2002 international symposium on Low power electronics and …, 2002 | 275 | 2002 |
| Probabilistic simulation for reliability analysis of CMOS VLSI circuits FN Najm, R Burch, P Yang, IN Hajj IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1990 | 264 | 1990 |
| Power macromodeling for high level power estimation S Gupta, FN Najm Proceedings of the 34th annual Design Automation Conference, 365-370, 1997 | 258 | 1997 |
| Statistical estimation of the switching activity in digital circuits MG Xakellis, FN Najm Proceedings of the 31st annual Design Automation Conference, 728-733, 1994 | 256 | 1994 |
| Active leakage power optimization for FPGAs JH Anderson, FN Najm, T Tuan Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004 | 228 | 2004 |
| Pattern independent maximum current estimation in power and ground buses of CMOS VLSI circuits: Algorithms, signal correlations, and their resolution H Kriplani, FN Najm, IN Hajj IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1995 | 209 | 1995 |
| Towards a high-level power estimation capability [digital ICs] M Nemani, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996 | 208 | 1996 |
| Power modeling for high-level power estimation S Gupta, FN Najm IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 18-29, 2000 | 178 | 2000 |
| Power estimation techniques for FPGAs JH Anderson, FN Najm IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (10 …, 2004 | 166 | 2004 |
| High-level area and power estimation for VLSI circuits M Nemani, FN Najm IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 158 | 1999 |
| Power estimation in sequential circuits FN Najm, S Goel, IN Hajj Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, 635-640, 1995 | 131 | 1995 |
| Pattern-independent current estimation for reliability analysis of CMOS circuits R Burch, F Najm, P Yang, D Hocevar Annual ACM IEEE Design Automation Conference: Proceedings of the 25 th ACM …, 1988 | 113 | 1988 |
| A static pattern-independent technique for power grid voltage integrity verification D Kouroussis, FN Najm Proceedings of the 40th annual Design Automation Conference, 99-104, 2003 | 111 | 2003 |
