| A 32.4 ppm/° C 3.2-1.6 V self-chopped relaxation oscillator with adaptive supply generation KJ Hsiao 2012 Symposium on VLSI Circuits (VLSIC), 14-15, 2012 | 101 | 2012 |
| The design and analysis of a DLL-based frequency synthesizer for UWB application TC Lee, KJ Hsiao IEEE Journal of Solid-State Circuits 41 (6), 1245-1252, 2006 | 98 | 2006 |
| An injection-locked ring PLL with self-aligned injection window CF Liang, KJ Hsiao 2011 IEEE International Solid-State Circuits Conference, 90-92, 2011 | 96 | 2011 |
| 17.7 A 1.89 nW/0.15 V self-charged XO for real-time clock generation KJ Hsiao 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 59 | 2014 |
| An 8-GHz to 10-GHz distributed DLL for multiphase clock generation KJ Hsiao, TC Lee IEEE journal of solid-state circuits 44 (9), 2478-2487, 2009 | 37 | 2009 |
| The design and analysis of a fully integrated multiplying DLL with adaptive current tuning KJ Hsiao, TC Lee IEEE journal of solid-state circuits 43 (6), 1427-1435, 2008 | 17 | 2008 |
| A DLL-based frequency multiplier for MBOA-UWB system TC Lee, KJ Hsiao Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005., 42-45, 2005 | 16 | 2005 |
| Injection-locked phase-locked loop with a self-aligned injection window CF Liang, KJ Hsiao US Patent 8,432,198, 2013 | 15 | 2013 |
| A low-jitter 8-to-10GHz distributed DLL for multiple-phase clock generation KJ Hsiao, TC Lee 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 14 | 2008 |
| A 40-GHz distributed-load static frequency divider TC Lee, HC Lee, K Hsiao, Y Huang, GJ Chen 2005 IEEE Asian Solid-State Circuits Conference, 205-208, 2005 | 13 | 2005 |
| Self-powered crystal oscillator and method of generating oscillation signal KJ Hsiao US Patent 9,112,449, 2015 | 10 | 2015 |
| Relaxation oscillator KJ Hsiao US Patent 8,912,855, 2014 | 9 | 2014 |
| A load-adaptive class-G headphone amplifier with supply-rejection bandwidth enhancement technique SH Wen, CM Chen, CC Yang, CH Chen, JF Jiang, KJ Hsiao, CY Chien IEEE Journal of Solid-State Circuits 51 (10), 2241-2251, 2016 | 8 | 2016 |
| A 130dB PSRR, 108dB DR and 95dB SNDR, ground-referenced audio decoder with PSRR-enhanced load-adaptive Class-G 16Ohm headphone amplifiers SH Wen, CM Chen, CC Yang, CH Chen, JF Jiang, KJ Hsiao, CY Chien 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-4, 2015 | 6 | 2015 |
| A clock and data recovery circuit with wide linear range frequency detector KJ Hsiao, MH Lee, TC Lee 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI …, 2008 | 5 | 2008 |
| A fully integrated 36MHz to 230MHz multiplying DLL with adaptive current tuning KJ Hsiao, TC Lee 2007 IEEE Symposium on VLSI Circuits, 230-231, 2007 | 4 | 2007 |
| High-precision frequency synthesizers for UWB applications TC Lee, KJ Hsiao, YC Huang Conference, Emerging Information Technology 2005., 4 pp., 2005 | 3 | 2005 |
| Clock generator and method of generating clock signal CM Kuo, WC Chao, KJ Hsiao, SY Yang, CC Chen US Patent 8,664,996, 2014 | 2 | 2014 |
| Method and circuitry for generating trigger signal and associated non-transitory computer program product KJ Hsiao, WC Chao, SC Wu, CY Chien US Patent 9,941,865, 2018 | | 2018 |
| Pulse width modulation based real-time clock system and associated method KH Chen, KJ Hsiao, HC Liu US Patent 9,563,242, 2017 | | 2017 |
