Dr Simon J. Hollis

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Soavtorji

Bernard H. StarkUniversity of BristolPreverjeni e-poštni naslov na bristol.ac.uk
liu daweiUniversity of BristolPreverjeni e-poštni naslov na bristol.ac.uk
Neville McNeillSenior Research Fellow in Power Electronics, University of StrathclydePreverjeni e-poštni naslov na strath.ac.uk
James PallisterUniversity of BristolPreverjeni e-poštni naslov na jpallister.com
Dinesh PamunuwaProfessor, University of Bristol, Royal Academy of Engineering and Microchip Senior Research ChairPreverjeni e-poštni naslov na bristol.ac.uk
Chris JacksonVyperCorePreverjeni e-poštni naslov na vypercore.com
Jeremy J. O. DaltonUniversity of BristolPreverjeni e-poštni naslov na bristol.ac.uk
Jawar Singh, Ph.D.Professor, Electrical Engineering Department, Indian Institute of Technology PatnaPreverjeni e-poštni naslov na iitp.ac.in
Dhiraj K PradhanProfessor of Computer Science, University of BristolPreverjeni e-poštni naslov na cs.bris.ac.uk
Simon MooreProfessor of Computer Engineering, University of CambridgePreverjeni e-poštni naslov na cl.cam.ac.uk
Radu MarculescuThe University of Texas at AustinPreverjeni e-poštni naslov na utexas.edu
Kerstin EderProfessor of Computer Science, University of BristolPreverjeni e-poštni naslov na bristol.ac.uk
Paul BogdanAssociate Professor, University of Southern CaliforniaPreverjeni e-poštni naslov na usc.edu
Jimson MathewIIT patnaPreverjeni e-poštni naslov na iitp.ac.in
Steve KerrisonJames Cook UniversityPreverjeni e-poštni naslov na stevekerrison.com
Jose Nunez-YanezLinköping UniversityPreverjeni e-poštni naslov na liu.se
Arash Farhadi BeldachiUniversity of BristolPreverjeni e-poštni naslov na bristol.ac.uk

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Dr Simon J. Hollis

Research Scientist at Facebook Reality Labs

Preverjeni e-poštni naslov na fb.com - Domača stran

Networks-on-Chip Energy Efficiency Interconnect Parallel Computing Many-core


Naslov Razvrsti po navedbah Razvrsti po letniku Razvrsti po naslovu	Navedeno Navedeno	Leto
A 6.7-ghz active gate driver for GaN FETs to combat overshoot, ringing, and EMI HCP Dymond, J Wang, D Liu, JJO Dalton, N McNeill, D Pamunuwa, ... IEEE Transactions on Power Electronics 33 (1), 581-594, 2018	212	2018
BEEBS: Open Benchmarks for Energy Measurements on Embedded Platforms J Pallister, S Hollis, J Bennett arXiv preprint arXiv:1308.5174, 2013	149	2013
Identifying compiler options to minimize energy consumption for embedded platforms J Pallister, SJ Hollis, J Bennett The Computer Journal 58 (1), 95-109, 2013	98	2013
A single ended 6T SRAM cell design for ultra-low-voltage applications J Singh, DK Pradhan, S Hollis, SP Mohanty IEICE Electronics Express 5 (18), 750-755, 2008	88	2008
Design of 370 ps Delay Floating Voltage Level Shifters with 30 V/ns Power Supply Slew Tolerance S Hollis, H Dymond, N McNeill, B Stark IEEE Transactions on Circuits and Systems II [To appear], 2016	61	2016
A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS D Liu, SJ Hollis, BH Stark IEEE Transactions on Circuits and Systems I: Regular Papers 66 (3), 1280-1290, 2018	52	2018
Exploiting emergence in on-chip interconnects SJ Hollis, C Jackson, P Bogdan, R Marculescu IEEE Transactions on Computers 63 (3), 570-582, 2014	46	2014
Challenges for Energy Harvesting Systems Under Intermittent Excitation G Yang, BH Stark, SJ Hollis, SG Burrow IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2014	37	2014
Full custom design of an arbitrary waveform gate driver with 10-GHz waypoint rates for GaN FETs D Liu, HCP Dymond, SJ Hollis, J Wang, N McNeill, D Pamunuwa, ... IEEE Transactions on Power Electronics 36 (7), 8267-8279, 2020	34	2020
Single ended 6T SRAM with isolated read-port for low-power embedded systems J Singh, DK Pradhan, S Hollis, SP Mohanty, J Mathew Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE'09 …, 2009	31	2009
Skip-links: A dynamically reconfiguring topology for energy-efficient NoCs C Jackson, SJ Hollis System on Chip (SoC), 2010 International Symposium on, 49-54, 2010	30	2010
Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers BS J Dalton, J Wang, H Dymond, D Liu, D Pamunuwa, N McNeill, S Hollis IEEE Applied Power Electronics Conference and Exposition 2017, 2017	24*	2017
Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-resistance patterns HCP Dymond, D Liu, J Wang, JJO Dalton, N McNeill, D Pamunuwa, ... Energy Conversion Congress and Exposition (ECCE), 2016 IEEE, 1-6, 2016	24	2016
A deadlock-free routing algorithm for dynamically reconfigurable Networks-on-Chip C Jackson, SJ Hollis Microprocessors and Microsystems 35 (2), 139-151, 2011	20	2011
A high-level model of embedded flash energy consumption J Pallister, K Eder, SJ Hollis, J Bennett Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2014 …, 2014	16	2014
RasP: an area-efficient, on-chip network S Hollis, SW Moore Computer Design, 2006. ICCD 2006. International Conference on, 63-69, 2007	16	2007
When does network-on-chip bypassing make sense? SJ Hollis, C Jackson 2009 IEEE International SOC Conference (SOCC), 143-146, 2009	15	2009
Building blocks for future dual-channel GaN gate drivers: Arbitrary waveform driver, bootstrap voltage supply, and level shifter D Liu, HCP Dymond, J Wang, BH Stark, SJ Hollis 2019 31st International Symposium on Power Semiconductor Devices and ICs …, 2019	13	2019
A new circuit topology for floating high voltage level shifters D Liu, SJ Hollis, BH Stark Microelectronics and Electronics (PRIME), 2014 10th Conference on Ph. D …, 2014	13	2014
Optimizing the flash-RAM energy trade-off in deeply embedded systems J Pallister, K Eder, SJ Hollis Proceedings of the 13th Annual IEEE/ACM International Symposium on Code …, 2015	11	2015

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