| A survey and evaluation of FPGA high-level synthesis tools R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 795 | 2015 |
| Bambu: A modular framework for the high level synthesis of memory-intensive applications C Pilato, F Ferrandi 2013 23rd International conference on field programmable logic and …, 2013 | 217 | 2013 |
| Ant colony heuristic for mapping and scheduling tasks and communications on heterogeneous embedded systems F Ferrandi, PL Lanzi, C Pilato, D Sciuto, A Tumeo IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 211 | 2010 |
| Agile SoC development with open ESP P Mantovani, D Giri, G Di Guglielmo, L Piccolboni, J Zuckerman, EG Cota, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 143 | 2020 |
| Securing hardware accelerators: A new challenge for high-level synthesis C Pilato, S Garg, K Wu, R Karri, F Regazzoni IEEE Embedded Systems Letters 10 (3), 77-80, 2017 | 103 | 2017 |
| Bambu: an open-source research framework for the high-level synthesis of complex applications F Ferrandi, VG Castellana, S Curzel, P Fezzardi, M Fiorito, M Lattuada, ... 2021 58th ACM/IEEE Design Automation Conference (DAC), 1327-1330, 2021 | 101 | 2021 |
| TAO: Techniques for algorithm-level obfuscation during high-level synthesis C Pilato, F Regazzoni, R Karri, S Garg Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 76 | 2018 |
| ASSURE: RTL locking against an untrusted foundry C Pilato, AB Chowdhury, D Sciuto, S Garg, R Karri IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (7 …, 2021 | 62 | 2021 |
| A multi-objective genetic algorithm for design space exploration in high-level synthesis F Ferrandi, PL Lanzi, D Loiacono, C Pilato, D Sciuto 2008 IEEE Computer Society Annual Symposium on VLSI, 417-422, 2008 | 62 | 2008 |
| CAD-Base: An attack vector into the electronics supply chain K Basu, SM Saeed, C Pilato, M Ashraf, MT Nabeel, K Chakrabarty, R Karri ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (4 …, 2019 | 58 | 2019 |
| TaintHLS: High-level synthesis for dynamic information flow tracking C Pilato, K Wu, S Garg, R Karri, F Regazzoni IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 50 | 2018 |
| An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems P Mantovani, EG Cota, K Tien, C Pilato, G Di Guglielmo, K Shepard, ... Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 46 | 2016 |
| System-level optimization of accelerator local memory for heterogeneous systems-on-chip C Pilato, P Mantovani, G Di Guglielmo, LP Carloni IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 45 | 2016 |
| Exploring eFPGA-based redaction for IP protection J Bhandari, AKT Moosa, B Tan, C Pilato, G Gore, X Tang, S Temple, ... 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 44 | 2021 |
| Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems A Tumeo, C Pilato, F Ferrandi, D Sciuto, PL Lanzi 2008 International Conference on Embedded Computer Systems: Architectures …, 2008 | 42 | 2008 |
| Hartes: Hardware-software codesign for heterogeneous multicore platforms K Bertels, VM Sima, Y Yankova, G Kuzmanov, W Luk, G Coutinho, ... IEEE micro 30 (5), 88-97, 2010 | 38 | 2010 |
| Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip P Mantovani, EG Cota, C Pilato, G Di Guglielmo, LP Carloni Proceedings of the International Conference on Compilers, Architectures and …, 2016 | 37 | 2016 |
| A design methodology to implement memory accesses in high-level synthesis C Pilato, F Ferrandi, D Sciuto Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011 | 37 | 2011 |
| Black-hat high-level synthesis: Myth or reality? C Pilato, K Basu, F Regazzoni, R Karri IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 913-926, 2018 | 33 | 2018 |
| Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs F Ferrandi, C Pilato, D Sciuto, A Tumeo 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 799-804, 2010 | 33 | 2010 |
Fabrizio FerrandiPolitecnico di MilanoPreverjeni e-poštni naslov na polimi.it
