| A performance analytical model for network-on-chip with constant service time routers N Nikitin, J Cortadella Proceedings of the 2009 International Conference on Computer-Aided Design …, 2009 | 56 | 2009 |
| Cost-comfort balancing in a smart residential building with bidirectional energy trading A Al Hasib, N Nikitin, L Natvig 2015 Sustainable Internet and ICT for Sustainability (SustainIT), 1-6, 2015 | 21 | 2015 |
| Analytical performance modeling of hierarchical interconnect fabrics N Nikitin, J de_San Pedro, J Carmona, J Cortadella 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 107-114, 2012 | 14 | 2012 |
| Static task mapping for tiled chip multiprocessors with multiple voltage islands N Nikitin, J Cortadella Architecture of Computing Systems–ARCS 2012: 25th International Conference …, 2012 | 14 | 2012 |
| Architectural exploration of large-scale hierarchical chip multiprocessors N Nikitin, J de San Pedro, J Cortadella IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 13 | 2013 |
| Physical-aware link allocation and route assignment for chip multiprocessing N Nikitin, S Chatterjee, J Cortadella, M Kishinevsky, U Ogras 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 125-134, 2010 | 13 | 2010 |
| Load scheduling in smart buildings with bidirectional energy trading A Al Hasib, N Nikitin, L Natvig 2014 IEEE 33rd International Performance Computing and Communications …, 2014 | 12 | 2014 |
| Physical-aware system-level design for tiled hierarchical chip multiprocessors J Cortadella, J de San Pedro, N Nikitin, J Petit Proceedings of the 2013 ACM International symposium on Physical Design, 3-10, 2013 | 4 | 2013 |
| Physical planning for the architectural exploration of large-scale chip multiprocessors J de San Pedro, N Nikitin, J Cortadella, J Petit 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 1-2, 2013 | 3 | 2013 |
| Automatic synthesis and optimization of chip multiprocessors N Nikitin Universitat Politècnica de Catalunya, 2013 | 2 | 2013 |
| Patterned Heterogeneous CMPs: The Case for Regularity-Driven System-Level Synthesis N Nikitin, M Jahre 2014 IEEE Computer Society Annual Symposium on VLSI, 172-177, 2014 | | 2014 |
| Automatic Synthesis and Optimization of Chip Multiprocessors J Carmona, G Dimitrakopoulos, JF Duato Marín, J Flich Cardo, A Juan, ... | | 2013 |
| Physical-aware system-level design for tiled hierarchical chip multiprocessors J Cortadella Fortuny, J San Pedro Martín, N Nikitin, J Petit Silvestre ACM Press. Association for Computing Machinery, 2013 | | 2013 |
| ACSD 2014 J Aguado, A Ali, M Alqarni, J Antezana, K Barylska, S Bernardi, P Bezdek, ... | | |
| Analytical Models for Architectural Exploration of Many-core Chip Multiprocessors N Nikitin | | |
