| Understanding the thermal implications of multi-core architectures P Chaparro, J Gonzáles, G Magklis, Q Cai, A González IEEE Transactions on Parallel and Distributed Systems 18 (8), 1055-1065, 2007 | 179 | 2007 |
| Meeting points: using thread criticality to adapt multicore hardware to parallel regions Q Cai, J González, R Rakvic, G Magklis, P Chaparro, A González Proceedings of the 17th international conference on Parallel architectures …, 2008 | 121 | 2008 |
| Thread migration to improve power efficiency in a parallel processing environment Q Cai, J González, PC Monferrer, G Magklis, A González US Patent 7,930,574, 2011 | 66 | 2011 |
| Optimal and efficient speculation-based partial redundancy elimination Q Cai, J Xue International Symposium on Code Generation and Optimization, 2003. CGO 2003 …, 2003 | 62 | 2003 |
| Thread shuffling: Combining DVFS and thread migration to reduce energy consumptions for multi-core systems Q Cai, J González, G Magklis, P Chaparro, A González IEEE/ACM International Symposium on Low Power Electronics and Design, 379-384, 2011 | 42 | 2011 |
| Fast and accurate exploration of multi-level caches using hierarchical reuse distance RKV Maeda, Q Cai, J Xu, Z Wang, Z Tian 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 33 | 2017 |
| A lifetime optimal algorithm for speculative PRE J Xue, Q Cai ACM Transactions on Architecture and Code Optimization (TACO) 3 (2), 115-155, 2006 | 32 | 2006 |
| Memory side acceleration for deep learning parameter updates C Xu, Q Cai US Patent 10,810,492, 2020 | 31 | 2020 |
| Reduced-precision memory value approximation for deep learning Z Deng, C Xu, Q Cai, P Faraboschi, H Packard Hewlett Packard Labs, HPL-2015-100, 2015 | 29 | 2015 |
| Sub-block based wear leveling N Hyuseinova, Q Cai US Patent App. 13/992,636, 2014 | 27 | 2014 |
| Parallel graph processing: Prejudice and state of the art A Eisenman, L Cherkasova, G Magalhaes, Q Cai, P Faraboschi, S Katti Proceedings of the 7th ACM/SPEC on International Conference on Performance …, 2016 | 25 | 2016 |
| Apparatus, system and method for adaptive cache replacement in a non-volatile main memory system Q Cai, N Hyuseinova, S Ozdemir, F Zyulkyarov, M Nicolaides, B Cuesta US Patent 9,003,126, 2015 | 23 | 2015 |
| Endurance aware error-correcting code (ECC) protection for non-volatile memories S Ozdemir, Q Cai US Patent 8,990,670, 2015 | 22 | 2015 |
| Dynamic thermal management using thin-film thermoelectric cooling P Chaparro, J González, Q Cai, G Chrysler Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009 | 22 | 2009 |
| Thread fusion J González, Q Cai, P Chaparro, G Magklis, R Rakvic, A González Proceedings of the 2008 international symposium on Low Power Electronics …, 2008 | 22 | 2008 |
| Thread migration to improve power efficiency in a parallel processing environment Q Cai, J González, PC Monferrer, G Magklis, A González US Patent 8,806,491, 2014 | 19 | 2014 |
| Compressing address communications between processors G Magklis, J Gonzalez, P Chaparro, Q Cai, A Gonzalez US Patent 7,698,512, 2010 | 18 | 2010 |
| Parallel graph processing on modern multi-core servers: New findings and remaining challenges A Eisenman, L Cherkasova, G Magalhaes, Q Cai, S Katti 2016 IEEE 24th International Symposium on Modeling, Analysis and Simulation …, 2016 | 16 | 2016 |
| Thread migration to improve power efficiency in a parallel processing environment Q Cai, J González, PC Monferrer, G Magklis, A González US Patent 8,166,323, 2012 | 16 | 2012 |
| Method for pinning data in large cache in multi-level memory system F Zyulkyarov, N Hyuseinova, Q Cai, B Cuesta, S Ozdemir, M Nicolaides US Patent 9,645,942, 2017 | 12 | 2017 |