3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration K Banerjee, SJ Souri, P Kapur, KC Saraswat
Proceedings of the IEEE 89 (5), 602-633, 2001
1322 2001 Interconnect limits on gigascale integration (GSI) in the 21st century JA Davis, R Venkatesan, A Kaloyeros, M Beylansky, SJ Souri, K Banerjee, ...
Proceedings of the IEEE 89 (3), 305-324, 2001
957 2001 Nanometre-scale germanium photodetector enhanced by a near-infrared dipole antenna L Tang, SE Kocabas, S Latif, AK Okyay, DS Ly-Gagnon, KC Saraswat, ...
Nature Photonics 2 (4), 226-229, 2008
845 2008 Three-dimensional integration of nanotechnologies for computing and data storage on a single chip MM Shulaker, G Hills, RS Park, RT Howe, K Saraswat, HSP Wong, S Mitra
Nature 547 (7661), 74-78, 2017
754 2017 Double-Gate Strained-Ge Heterostructure Tunneling FET (TFET) With record high drive currents and≪ 60mV/dec subthreshold slope T Krishnamohan, D Kim, S Raghunathan, K Saraswat
2008 IEEE International Electron Devices Meeting, 1-3, 2008
691 2008 Germanium nanowire field-effect transistors with D Wang, Q Wang, A Javey, R Tu, H Dai, H Kim, PC McIntyre, ...
Applied Physics Letters 83 (12), 2432-2434, 2003
639 2003 Improved Contacts to MoS2 Transistors by Ultra-High Vacuum Metal Deposition CD English, G Shine, VE Dorgan, KC Saraswat, E Pop
Nano letters 16 (6), 3824-3830, 2016
593 2016 Achieving direct band gap in germanium through integration of Sn alloying and external strain S Gupta, B Magyari-Köpe, Y Nishi, KC Saraswat
Journal of Applied Physics 113 (7), 2013
515 2013 Effect of scaling of interconnections on the time delay of VLSI circuits KC Saraswat, F Mohammadi
IEEE Transactions on Electron Devices 29 (4), 645-650, 1982
489 1982 Dopant segregation in polycrystalline silicon MM Mandurah, KC Saraswat, CR Helms, TI Kamins
Journal of applied physics 51 (11), 5755-5763, 1980
487 1980 Two-dimensional thermal oxidation of silicon. II. Modeling stress effects in wet oxides DB Kao, JP Mcvittie, WD Nix, KC Saraswat
IEEE transactions on electron devices 35 (1), 25-37, 1988
476 1988 On the correct extraction of interface trap density of MOS devices with high-mobility semiconductor substrates K Martens, CO Chui, G Brammertz, B De Jaeger, D Kuzum, M Meuris, ...
IEEE Transactions on Electron Devices 55 (2), 547-556, 2008
456 2008 Germanium MOS capacitors incorporating ultrathin high-/spl kappa/gate dielectric CO Chui, S Ramanathan, BB Triplett, PC McIntyre, KC Saraswat
IEEE Electron Device Letters 23 (8), 473-475, 2002
436 2002 Multiple Si layer ICs: Motivation, performance analysis, and design implications SJ Souri, K Banerjee, A Mehrotra, KC Saraswat
Proceedings of the 37th Annual Design Automation Conference, 213-220, 2000
383 2000 Activation and diffusion studies of ion-implanted p and n dopants in germanium CO Chui, K Gopalakrishnan, PB Griffin, JD Plummer, KC Saraswat
Applied physics letters 83 (16), 3275-3277, 2003
376 2003 Thermal/microwave remote plasma multiprocessing reactor and method of use MM Moslehi, KC Saraswat
US Patent 4,913,929, 1990
350 1990 A sub-400/spl deg/C germanium MOSFET technology with high-/spl kappa/dielectric and metal gate CO Chui, H Kim, D Chi, BB Triplett, PC Mcintyre, KC Saraswat
Digest. International Electron Devices Meeting,, 437-440, 2002
324 2002 Electrical and materials properties of ZrO2 gate dielectrics grown by atomic layer chemical vapor deposition CM Perkins, BB Triplett, PC McIntyre, KC Saraswat, S Haukka, ...
Applied Physics Letters 78 (16), 2357-2359, 2001
319 2001 Technology and reliability constrained future copper interconnects. I. Resistance modeling P Kapur, JP McVittie, KC Saraswat
IEEE Transactions on electron devices 49 (4), 590-597, 2002
309 2002 Two-dimensional thermal oxidation of silicon—I. Experiments DB Kao, JP McVittie, WD Nix, KC Saraswat
IEEE Transactions on Electron Devices 34 (5), 1008-1017, 1987
308 1987 