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Krishna T. Malladi
Krishna T. Malladi
AI Systems architect, Meta Platforms
E-mail confirmado em alumni.stanford.edu - Página inicial
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Citado por
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Drisa: A dram-based reconfigurable in-situ accelerator
S Li, D Niu, KT Malladi, H Zheng, B Brennan, Y Xie
Proceedings of the 50th annual ieee/acm international symposium on …, 2017
4922017
Towards energy-proportional datacenter memory with mobile DRAM
KT Malladi, BC Lee, FA Nothaft, C Kozyrakis, K Periyathambi, M Horowitz
ACM SIGARCH Computer Architecture News 40 (3), 37-48, 2012
3592012
LazyPIM: An efficient cache coherence mechanism for processing-in-memory
A Boroumand, S Ghose, M Patel, H Hassan, B Lucia, K Hsieh, KT Malladi, ...
IEEE Computer Architecture Letters 16 (1), 46-50, 2016
2262016
CoNDA: Efficient cache coherence support for near-data accelerators
A Boroumand, S Ghose, M Patel, H Hassan, B Lucia, R Ausavarungnirun, ...
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
1402019
Scope: A stochastic computing engine for dram-based in-situ accelerator
S Li, AO Glova, X Hu, P Gu, D Niu, KT Malladi, H Zheng, B Brennan, Y Xie
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
1312018
Rethinking DRAM power modes for energy proportionality
KT Malladi, I Shaeffer, L Gopalakrishnan, D Lo, BC Lee, M Horowitz
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 131-142, 2012
892012
Reconfigurable logic architecture
M Gao, H Zheng, KT Malladi, R Brennan
US Patent 9,577,644, 2017
582017
Enabling CXL memory expansion for in-memory database management systems
M Ahn, A Chang, D Lee, J Gim, J Kim, J Jung, O Rebholz, V Pham, ...
Proceedings of the 18th International Workshop on Data Management on New …, 2022
512022
Performance analysis of containerized applications on local and remote storage
Q Xu, M Awasthi, KT Malladi, J Bhimani, J Yang, M Annavaram, M Hsieh
Proc. of MSST 3, 24-28, 2017
422017
Flash-integrated high bandwidth memory appliance
KT Malladi, H Zheng
US Patent 11,397,687, 2022
412022
DPU architecture
S Li, D Niu, K Malladi, H Zheng
US Patent 10,242,728, 2019
402019
Multi-tier buffer management and storage system design for non-volatile memory
J Arulraj, A Pavlo, KT Malladi
arXiv preprint arXiv:1901.10938, 2019
392019
DRAF: A low-power DRAM-based reconfigurable acceleration fabric
M Gao, C Delimitrou, D Niu, KT Malladi, H Zheng, B Brennan, C Kozyrakis
ACM SIGARCH Computer Architecture News 44 (3), 506-518, 2016
372016
DLUX: A LUT-based near-bank accelerator for data center deep learning training workloads
P Gu, X Xie, S Li, D Niu, H Zheng, KT Malladi, Y Xie
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
332020
System with cache-coherent memory and server-linking switch
KT Malladi, A Chang, EM Najafabadi
US Patent 11,416,431, 2022
292022
Electronic system with partitioning mechanism and method of operation thereof
D Niu, H Zheng, K Malladi
US Patent 9,727,239, 2017
262017
HBM based memory lookup engine for deep learning accelerator
P Gu, KT Malladi, H Zheng
US Patent 11,119,677, 2021
252021
LazyPIM: Efficient support for cache coherence in processing-in-memory architectures
A Boroumand, S Ghose, M Patel, H Hassan, B Lucia, N Hajinazar, ...
arXiv preprint arXiv:1706.03162, 2017
242017
Systems and methods for composable coherent devices
KT Malladi, A Chang, E Najafabadi, YA Zaghloul
US Patent App. 17/135,901, 2021
232021
ISA extension for high-bandwidth memory
MT Chang, KT Malladi, D Niu, H Zheng
US Patent 10,866,900, 2020
202020
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