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Sangdon Jung
Tytuł
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A 366kS/s 400uW 0.0013mm2 frequency-to-digital converter based CMOS temperature sensor utilizing multiphase clock
K Kim, H Lee, S Jung, C Kim
2009 IEEE Custom Integrated Circuits Conference, 203-206, 2009
572009
NB-IoT and GNSS all-in-one system-on-chip integrating RF transceiver, 23-dBm CMOS power amplifier, power management unit, and clock management system for low cost solution
J Lee, J Han, CL Lo, J Lee, W Kim, S Kim, B Kang, J Han, S Jung, ...
IEEE Journal of Solid-State Circuits 55 (12), 3400-3413, 2020
502020
Apparatus and method for measurement of temperature using oscillators
C Kim, J Song, G Yoon, S Jung
US Patent 7,914,204, 2011
202011
A 9.4 MHz-to-2.4 GHz jitter-power reconfigurable fractional-N ring PLL for multi-standard applications in 7nm FinFET CMOS technology
S Jung, J Jung, B Han, S Oh, J Lee
2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 87-90, 2019
132019
A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling Ring PLL with a Jitter-Tracking DLL-Assisted DTC
J Jung, S Jung, K Lee, J Jung, S Kim, B Han, S Oh, J Lee
2020 IEEE Symposium on VLSI Circuits, 1-2, 2020
122020
A 0.0018 mm2 frequency-to-digital-converter-based CMOS smart temperature sensor
H Lee, K Kim, S Jung, J Song, JK Kim, C Kim
Analog Integrated Circuits and Signal Processing 64, 153-157, 2010
102010
Phase-locked loop circuit and clock generator including the same
J Jung, S Jung, K Lee, HAN Byungki
US Patent 11,057,040, 2021
62021
30.2 NB-IoT and GNSS all-in-one system-on-chip integrating RF transceiver, 23dBm CMOS power amplifier, power management unit and clock management system for low-cost solution
J Lee, J Han, C Lo, J Lee, W Kim, S Kim, B Kang, J Han, S Jung, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 462-464, 2020
62020
Phase-locked loop (PLL) circuit and clock generator including sub-sampling circuit
J Jung, S Jung, S Oh, K Lee
US Patent 10,879,914, 2020
52020
A wide-range duty-independent all-digital multiphase clock generator
H Chae, S Jung, C Kim
ESSCIRC 2007-33rd European Solid-State Circuits Conference, 186-189, 2007
42007
Clock generator for adjusting jitter characteristics and operation power, semiconductor device including the clock generator, and operating method of the clock generator
S Jung, J Jung, S Oh, K Lee
US Patent 10,921,847, 2021
32021
A blocker-tolerant direct sampling receiver for wireless multi-channel communication in 14nm FinFET CMOS
B Sung, C Lo, J Lee, S Jung, S Kim, J Jung, S Bae, Y Cho, Y Lim, D Choi, ...
2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 165-168, 2019
32019
A Crystal-Less Clock Generator for Low-Power and Low-Cost Sensor Transceivers with 12.9 MHz-to-3.3 GHz Range, 16.67 ppm/° C Inaccuracy from− 25° C to 85° C, and 0.25 us Settle-Time
S Jung, J Yu, M Park, JH Chun
2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2023
12023
Phase locked loop and operating method of phase locked loop
S Jung, G Kim, S Kim, S Oh, J Kim
US Patent 11,601,131, 2023
12023
A 5.0-to-12.5-Gb/s, 1.7-pJ/b, 0.66-μs Lock-time Reference-less Sub-sampling CDR with Beat Detection FLL in 28nm CMOS
W Park, J Jin, M Park, S Jung, JH Chun
2022 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2022
12022
Pixel clock generator, digital TV including the same, and method of generating pixel clock
KY Choo, D Kim, TI Kim, M Jong-Bin, SD Jung
US Patent 9,215,352, 2015
12015
Temperature compensated oscillation controller and temperature compensated crystal oscillator including the same
S Jung, D Lim, W Kim
US Patent 10,483,984, 2019
2019
On-chip Power Supply Noise Measurement Circuit with 2.06 mV/count Resolution
HK Lee, SD Jung, CW Kim
Journal of IKEEE 13 (4), 9-14, 2009
2009
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