| PoisonIvy: Safe speculation for secure memory TS Lehman, AD Hilton, BC Lee 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 79 | 2016 |
| Processor with hybrid pipeline capable of operating in out-of-order and in-order modes M Comparan, AD Hilton, HM Jacobson, BM Rogers, RA Shearer, KV Vu, ... US Patent 9,354,884, 2016 | 76 | 2016 |
| iCFP: Tolerating all-level cache misses in in-order processors A Hilton, S Nagarakatte, A Roth 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 74 | 2009 |
| Global branch prediction using branch and fetch group history TH Heil, AD Hilton US Patent 9,921,846, 2018 | 53 | 2018 |
| Load latency speculation in an out-of-order computer processor TH Heil, AD Hilton, AJ Muff US Patent 9,256,428, 2016 | 40 | 2016 |
| BOLT: Energy-efficient out-of-order latency-tolerant execution A Hilton, A Roth HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010 | 40 | 2010 |
| Ginger: Control independence using tag rewriting AD Hilton, A Roth ACM SIGARCH Computer Architecture News 35 (2), 436-447, 2007 | 38 | 2007 |
| FIESTA: A sample-balanced multi-program workload methodology A Hilton, N Eswaran, A Roth Proc. MoBS, 2009 | 35 | 2009 |
| Xchange: coupling parallel applications in a dynamic environment H Abbasi, M Wolf, K Schwan, G Eisenhauer, A Hilton 2004 IEEE International Conference on Cluster Computing (IEEE Cat. No …, 2004 | 30 | 2004 |
| Maps: Understanding metadata access patterns in secure memory TS Lehman, AD Hilton, BC Lee 2018 IEEE international symposium on performance analysis of systems and …, 2018 | 23 | 2018 |
| Load latency speculation in an out-of-order computer processor TH Heil, AD Hilton, AJ Muff US Patent 9,262,160, 2016 | 19 | 2016 |
| Translation from problem to code in seven steps AD Hilton, GM Lipp, SH Rodger Proceedings of the ACM Conference on Global Computing Education, 78-84, 2019 | 16 | 2019 |
| Multi-program benchmark definition AN Jacobvitz, AD Hilton, DJ Sorin 2015 IEEE international symposium on performance analysis of systems and …, 2015 | 15 | 2015 |
| CPROB: Checkpoint processing with opportunistic minimal recovery A Hilton, N Eswaran, A Roth 2009 18th International Conference on Parallel Architectures and Compilation …, 2009 | 15 | 2009 |
| Flexible register management using reference counting S Battle, AD Hilton, M Hempstead, A Roth IEEE International Symposium on High-Performance Comp Architecture, 1-12, 2012 | 13 | 2012 |
| Decoupled store completion/silent deterministic replay: Enabling scalable data memory for CPR/CFP processors A Hilton, A Roth ACM SIGARCH Computer Architecture News 37 (3), 245-254, 2009 | 13 | 2009 |
| DynaSprint: Microarchitectural sprints with dynamic utility and thermal management Z Huang, JA Joao, A Rico, AD Hilton, BC Lee Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 12 | 2019 |
| End-to-end latency optimization of multi-view 3D reconstruction for disaster response X Zhang, M Li, A Hilton, A Pal, S Dey, S Debroy 2022 10th IEEE International Conference on Mobile Cloud Computing, Services …, 2022 | 8 | 2022 |
| Processor with hybrid pipeline capable of operating in out-of-order and in-order modes M Comparan, AD Hilton, HM Jacobson, BM Rogers, RA Shearer, KV Vu, ... US Patent 10,831,504, 2020 | 7 | 2020 |
| Processor with hybrid pipeline capable of operating in out-of-order and in-order modes M Comparan, AD Hilton, HM Jacobson, BM Rogers, RA Shearer, KV Vu, ... US Patent 10,114,652, 2018 | 5 | 2018 |
