A frequent-value based PRAM memory architecture G Sun, D Niu, J Ouyang, Y Xie 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 211-216, 2011 | 64 | 2011 |
DimNoC: A dim silicon approach towards power-efficient on-chip network J Zhan, J Ouyang, F Ge, J Zhao, Y Xie Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 57 | 2015 |
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC) Y Ye, L Duan, J Xu, J Ouyang, MK Hung, Y Xie 2009 IEEE International Conference on 3D System Integration, 1-6, 2009 | 56 | 2009 |
LOFT: A high performance network-on-chip providing quality-of-service support J Ouyang, Y Xie 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 409-420, 2010 | 46 | 2010 |
Hybrid drowsy SRAM and STT-RAM buffer designs for dark-silicon-aware NoC J Zhan, J Ouyang, F Ge, J Zhao, Y Xie IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016 | 45 | 2016 |
Designing energy-efficient NoC for real-time embedded systems through slack optimization J Zhan, N Stoimenov, J Ouyang, L Thiele, V Narayanan, Y Xie Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013 | 42 | 2013 |
Evaluation of using inductive/capacitive-coupling vertical interconnects in 3D network-on-chip J Ouyang, J Xie, M Poremba, Y Xie 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 477-482, 2010 | 42 | 2010 |
Arithmetic unit design using 180nm TSV-based 3D stacking technology J Ouyang, G Sun, Y Chen, L Duan, T Zhang, Y Xie, MJ Irwin 2009 IEEE International Conference on 3D System Integration, 1-4, 2009 | 37 | 2009 |
Power optimization for FinFET-based circuits using genetic algorithms J Ouyang 2008 IEEE International SOC Conference, 211-214, 2008 | 30 | 2008 |
Optimizing the NoC slack through voltage and frequency scaling in hard real-time embedded systems J Zhan, N Stoimenov, J Ouyang, L Thiele, V Narayanan, Y Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 26 | 2014 |
Enabling quality-of-service in nanophotonic network-on-chip J Ouyang, Y Xie 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 351-356, 2011 | 13 | 2011 |
ILP-based scheme for timing variation-aware scheduling and resource binding Y Chen, J Ouyang, Y Xie 2008 IEEE International SOC Conference, 27-30, 2008 | 8 | 2008 |
F2BFLY: an on-chip free-space optical network with wavelength-switching J Ouyang, C Yang, D Niu, Y Xie, Z Liu Proceedings of the international conference on Supercomputing, 348-358, 2011 | 7 | 2011 |
Checkercore: Enhancing an fpga soft core to capture worst-case execution times J Ouyang, R Raghavendra, S Mohan, T Zhang, Y Xie, F Mueller Proceedings of the 2009 international conference on Compilers, architecture …, 2009 | 4 | 2009 |
three-dimensional integrated circuits design Y Xie, P Marchal IET Computers & Digital Techniques 5 (3), 159, 2011 | 2 | 2011 |
Architecting On-chip Interconnection Network for Future Many-core Chip-multiprocessors J Ouyang | 1 | 2012 |