| Instruction set for a content addressable memory array with read/write circuits and an interface register logic block CD Stormon, E Saleh, NB Troullinos, RM Leong US Patent 5,860,085, 1999 | 123 | 1999 |
| Integrated content addressable memory array with processing logical and a host computer interface CD Stormon, A Chavan, NB Troullinos, RM Leong US Patent 5,649,149, 1997 | 71 | 1997 |
| Optical techniques and data/knowledge base machines PB Berra, NB Troullinos Computer 20 (10), 59-70, 1987 | 39 | 1987 |
| A general-purpose CMOS associative processor IC and system CD Stormon, NB Troullinos, EM Saleh, AV Chavan, MR Brule, JV Oldfield IEEE Micro 12 (6), 68-78, 1992 | 28 | 1992 |
| Head-Order Techniques and Other Pragmatics of Lambda Calculus Graph Reduction NB Troullinos Universal-Publishers, 2011 | 3 | 2011 |
| Microscopic Adventures of a Chip Circuitry Repairman K Kaplan http://iq.intel.com/microscopic-adventures-of-a-chip-circuitry-repairman/, 2015 | | 2015 |
| Microscopic Adventures of a Chip Circuitry Repairman K Kaplan http://iq.intel.com/microscopic-adventures-of-a-chip-circuitry-repairman/, 2015 | | 2015 |
| Optical Techniques and PB Berra, NB Troullinos Tutorial: Parallel Architectures for Database Systems, 263, 1989 | | 1989 |