FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator G Yuan*, P Behnam*, Z Li, A Shafiee, S Lin, X Ma, H Liu, X Qian, ...
021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
82 2021 Tinyadc: Peripheral circuit-aware weight pruning framework for mixed-signal dnn accelerators G Yuan*, P Behnam*, Y Cai, A Shafiee, J Fu, Z Liao, Z Li, X Ma, J Deng, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 926-931, 2021
30 2021 A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs B Alizadeh, P Behnam, S Sadeghi-kohan
IEEE Transactions on Computers 64 (6), 1564-1578, 2015
21 2015 High-Speed Hardware Implementation of Fixed and Run-time Variable Window Length 1-D Median Filters E Nikahd*, P Behnam*, R Sameni
IEEE Transactions on Circuits and Systems II 63 (5), 478 - 482, 2016
19 2016 Accelerating YK Rupesh, P Behnam, GR Pandla, M Miryala, MN Bojnordi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (12 …, 2018
18 2018 Formal equivalence verification and debugging techniques with auto-correction mechanism for RTL designs B Alizadeh, P Behnam
Microprocessors and Microsystems 37 (8), 1108-1121, 2013
17 2013 AFFIX: Automatic acceleration framework for FPGA implementation of OpenVX vision algorithms S Taheri, P Behnam, E Bozorgzadeh, A Veidenbaum, A Nicolau
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
16 2019 In-circuit mutation-based automatic correction of certain design errors using SAT mechanisms P Behnam, B Alizadeh
2015 IEEE 24th Asian Test Symposium (ATS), 199-204, 2015
16 2015 Acceleration Framework for FPGA Implementation of OpenVX Graph Pipelines S Taheri, J Heo, P Behnam, J Chen, A Veidenbaum, A Nicolau
26'th IEEE International Symposium on Field-Programmable Custom Computing …, 2018
15 2018 CoDG-ReRAM: An Algorithm-Hardware Co-design to Accelerate Semi-Structured GNNs on ReRAM Y Luo*, P Behnam*, K Thorat, Z Liu, H Peng, S Huang, S Zhou, O Khan, ...
2022 IEEE 40th International Conference on Computer Design (ICCD), 280-289, 2022
14 2022 R-cache: A highly set-associative in-package cache using memristive arrays P Behnam, AP Chowdhury, MN Bojnordi
2018 IEEE 36th International Conference on Computer Design (ICCD), 423-430, 2018
14 2018 STFL-DDR: Improving the energy-efficiency of memory interface P Behnam, MN Bojnordi
IEEE Transactions on Computers 69 (12), 1823-1834, 2020
12 2020 Automatic correction of certain design errors using mutation technique. P Behnam, B Alizadeh, Z Navabi
2014 19th IEEE European Test Symposium (ETS), 1-2, 2014
12 2014 Formal verification and debugging of array dividers with auto-correction mechanism MH Haghbayan, B Alizadeh, P Behnam, S Safari
2014 27th International Conference on VLSI Design and 2014 13th …, 2014
11 2014 STFL: Energy-efficient data movement with slow transition fast level signaling P Behnam, MN Bojnordi
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
10 2019 Reducing search space for fault diagnosis: A probability-based scoring approach H Sabaghian-Bidgoli, P Behnam, B Alizadeh, Z Navabi
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 545-550, 2017
10 2017 Improving polynomial datapath debugging with HEDs S Sadeghi-Kohan, P Behnam, B Alizadeh, M Fujita, Z Navabi
2014 19th IEEE European Test Symposium (ETS), 1-6, 2014
8 2014 A probabilistic approach for counterexample generation to aid design debugging P Behnam, H Sabaghian-Bidgoli, B Alizadeh, K Mohajerani, Z Navabi
East-West Design & Test Symposium (EWDTS 2013), 1-5, 2013
7 2013 Mutation Based Debugging Technique with Auto-Correction Mechanism for RTL Designs P Behnam, B Alizadeh, Z Navabi, M Fujita
8'th IEEE International Workshop of Silicon Debug and Diagnosis (SDD), in …, 2012
7 2012 Hardware–software co-design for real-time latency–accuracy navigation in tiny machine learning applications P Behnam, J Tong, A Khare, Y Chen, Y Pan, P Gadikar, A Bambhaniya, ...
IEEE Micro 43 (6), 93-101, 2023
6 2023 
Mahdi Nazm BojnordiPrincipal Engineer, Qualcomm AI ResearchZweryfikowany adres z cs.utah.edu
