| Photonic networks-on-chip for future generations of chip multiprocessors A Shacham, K Bergman, LP Carloni IEEE Transactions on Computers 57 (9), 1246-1260, 2008 | 1107 | 2008 |
| Theory of latency-insensitive design LP Carloni, KL McMillan, AL Sangiovanni-Vincentelli IEEE Transactions on computer-aided design of integrated circuits and …, 2001 | 571 | 2001 |
| On the design of a photonic network-on-chip A Shacham, K Bergman, LP Carloni First International Symposium on Networks-on-Chip (NOCS'07), 53-64, 2007 | 405 | 2007 |
| Creation of structured data from plain text A Saldanha, PC McGeer, L Carloni US Patent 6,714,939, 2004 | 309 | 2004 |
| On learning-based methods for design-space exploration with high-level synthesis HY Liu, LP Carloni Proceedings of the 50th annual design automation conference, 1-7, 2013 | 265 | 2013 |
| Languages and tools for hybrid systems design LP Carloni, R Passerone, A Pinto, AL Sangiovanni-Vincentelli Foundations and Trends® in Electronic Design Automation 1 (1–2), 1-193, 2006 | 253 | 2006 |
| Benefits and challenges for platform-based design A Sangiovanni-Vincentelli, L Carloni, F De Bernardinis, M Sgroi Proceedings of the 41st Annual Design Automation Conference, 409-414, 2004 | 247 | 2004 |
| Networks-on-chip in emerging interconnect paradigms: Advantages and challenges LP Carloni, P Pande, Y Xie 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 93-102, 2009 | 244 | 2009 |
| A methodology for correct-by-construction latency insensitive design LP Carloni, KL McMillan, A Saldanha, AL Sangiovanni-Vincentelli The Best of ICCAD: 20 Years of Excellence in Computer-Aided Design, 143-158, 2003 | 239 | 2003 |
| Creation of structured data from plain text A Saldanha, P McGreer, L Carloni US Patent 7,324,936, 2008 | 203 | 2008 |
| Efficient synthesis of networks on chip A Pinto, LP Carloni, AL Sangiovanni-Vincentelli Proceedings 21st International Conference on Computer Design, 146-150, 2003 | 192 | 2003 |
| Coping with latency in SoC design LP Carloni, A Sangiovanni-Vincentelli IEEE Micro 22 (5), 24-35, 2002 | 188 | 2002 |
| Photonic NoC for DMA communications in chip multiprocessors A Shacham, BG Lee, A Biberman, K Bergman, LP Carloni 15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007), 29-38, 2007 | 181 | 2007 |
| Phoenixsim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks J Chan, G Hendry, A Biberman, K Bergman, LP Carloni 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 178 | 2010 |
| A 2.5 D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer N Sturcken, EJ O'Sullivan, N Wang, P Herget, BC Webb, LT Romankiw, ... IEEE Journal of solid-state circuits 48 (1), 244-254, 2012 | 168 | 2012 |
| hls4ml: An open-source codesign workflow to empower scientific low-power machine learning devices F Fahim, B Hawks, C Herwig, J Hirschauer, S Jindariani, N Tran, ... arXiv preprint arXiv:2103.05579, 2021 | 153 | 2021 |
| Photonic network-on-chip design K Bergman, LP Carloni, A Biberman, J Chan, G Hendry Springer New York, 2014 | 152 | 2014 |
| Physical-layer modeling and system-level design of chip-scale photonic interconnection networks J Chan, G Hendry, K Bergman, LP Carloni IEEE Transactions on computer-aided design of integrated circuits and …, 2011 | 150 | 2011 |
| Agile SoC development with open ESP P Mantovani, D Giri, G Di Guglielmo, L Piccolboni, J Zuckerman, EG Cota, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 134 | 2020 |
| An analysis of accelerator coupling in heterogeneous architectures EG Cota, P Mantovani, G Di Guglielmo, LP Carloni Proceedings of the 52Nd Annual Design Automation Conference, 1-6, 2015 | 113 | 2015 |
Alberto Sangiovanni VincentelliProfessor of EECS, University of California, BerkeleyVerifisert e-postadresse på eecs.berkeley.edu
