The secretblaze: A configurable and cost-effective open-source soft-core processor L Barthe, LV Cargnini, P Benoit, L Torres 2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011 | 52 | 2011 |
Trends on the application of emerging nonvolatile memory to processors and programmable devices L Torres, RM Brum, LV Cargnini, G Sassatelli 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 101-104, 2013 | 46 | 2013 |
A Reed-Solomon algorithm for FPGA area optimization in space applications GM Almeida, EA Bezerra, LV Cargnini, RDR Fagundes, DG Mesquita Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 243-249, 2007 | 39 | 2007 |
Design of MRAM based logic circuits and its applications W Zhao, L Torres, Y Guillemenet, LV Cargnini, Y Lakys, JO Klein, ... Proceedings of the 21st edition of the great lakes symposium on Great lakes …, 2011 | 36 | 2011 |
Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory LV Cargnini, L Torres, RM Brum, S Senni, G Sassatelli Low Power Electronics and Applications 4 (3), 214-230, 2014 | 23 | 2014 |
High performance SoC design using magnetic logic and memory W Zhao, L Torres, LV Cargnini, RM Brum, Y Zhang, Y Guillemenet, ... IFIP/IEEE International Conference on Very Large Scale Integration-System on …, 2011 | 22 | 2011 |
Volatility management for non-volatile memory device V Dubeyko, L Cargnini US Patent 10,606,513, 2020 | 21 | 2020 |
FABRIC INTERCONNECTION FOR MEMORY BANKS BASED ON NETWORK-ON-CHIP METHODOLOGY L Cargnini, ZZ Bandic, D Vucinic US Patent US20,170,118,139, 2017 | 19* | 2017 |
Embedded MRAM for high-speed computing WS Zhao, Y Zhang, Y Lakys, JO Klein, D Etiemble, D Revelosona, ... 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 37-42, 2011 | 18 | 2011 |
Processor in non-volatile storage memory LV Cargnini, VA Dubeyko US Patent 10,114,795, 2018 | 15 | 2018 |
Method and apparatus for offloading data processing to hybrid storage devices LV Cargnini, VA Dubeyko US Patent 10,359,953, 2019 | 14 | 2019 |
Parallel Algebraic Approach of BCH coding in VHDL LV Cargnini, RDR Fagundes, EA Bezerra, GM Almeida 2007 International Multi-Conference on Computing in the Global Information …, 2007 | 13 | 2007 |
Optimizing an open-source processor for FPGAs: A case study L Barthe, LV Cargnini, P Benoit, L Torres 2011 21st International Conference on Field Programmable Logic and …, 2011 | 12 | 2011 |
MULTILAYER 3D MEMORY BASED ON NETWORK-ON-CHIP INTERCONNECTION LV Cargnini, KA Rubin, ZZ Bandic, D Vucinic US Patent US20,170,118,111, 2017 | 10* | 2017 |
Embedded memory hierarchy exploration based on magnetic RAM LV Cargnini, L Torres, RM Brum, S Senni, G Sassatelli 2013 IEEE Faible Tension Faible Consommation, 1-4, 2013 | 9 | 2013 |
Evaluation of hybrid MRAM/CMOS cells for reconfigurable computing L Torres, RM Brum, Y Guillemenet, G Sassatelli, LV Cargnini 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS), 1-6, 2013 | 9 | 2013 |
Method for Encoding or Decoding Multidimensional and A system comprising such method LV Cargnini, RDR Fagundes US Patent US 2011/0083062 A1, 2011 | 8 | 2011 |
Improving the reliability of a FPGA using fault-tolerance mechanism based on magnetic memory (MRAM) LV Cargnini, Y Guillemenet, L Torres, G Sassatelli 2010 International Conference on Reconfigurable Computing and FPGAs, 150-155, 2010 | 6 | 2010 |
Coherent controller ZZ Bandic, LV Cargnini, D Vucinic, Q Wang US Patent 10,152,435, 2018 | 5 | 2018 |
Methods, systems and devices for recovering from corruptions in data processing units in non-volatile memory devices VA Dubeyko, LV Cargnini US Patent 10,528,426, 2020 | 4 | 2020 |