| 7.6 A 65nm 236.5 nJ/classification neuromorphic processor with 7.5% energy overhead on-chip learning using direct spike-only feedback J Park, J Lee, D Jeon 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 140-142, 2019 | 90 | 2019 |
| A 65-nm neuromorphic image classification processor with energy-efficient training through direct spike-only feedback J Park, J Lee, D Jeon IEEE Journal of Solid-State Circuits 55 (1), 108-119, 2019 | 57 | 2019 |
| 9.3 A 40nm 4.81 TFLOPS/W 8b floating-point training processor for non-sparse neural networks using shared exponent bias and 24-way fused multiply-add tree J Park, S Lee, D Jeon 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 1-3, 2021 | 45 | 2021 |
| A neural network training processor with 8-bit shared exponent bias floating point and multiple-way fused multiply-add trees J Park, S Lee, D Jeon IEEE Journal of Solid-State Circuits 57 (3), 965-977, 2021 | 30 | 2021 |
| Toward Efficient Low-Precision Training: Data Format Optimization and Hysteresis Quantization S Lee, J Park, D Jeon International Conference on Learning Representations, 2021 | 11 | 2021 |
| Activation Sharing with Asymmetric Paths Solves Weight Transport Problem without Bidirectional Connection S Woo, J Park, J Hong, D Jeon Advances in Neural Information Processing Systems 34, 29697-29709, 2021 | 2 | 2021 |
| A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array DJ Sunwoo Lee, Jeongwoo Park IEEE European Solid-State Circuits Conference (ESSCIRC), 2023 | 1* | 2023 |
