Artikler med mandater om offentlig tilgang - Gengchiau LiangLes mer
Ikke tilgjengelige noe sted: 20
Ultrafast and energy-efficient spin–orbit torque switching in compensated ferrimagnets
K Cai, Z Zhu, JM Lee, R Mishra, L Ren, SD Pollard, P He, G Liang, KL Teo, ...
Nature Electronics 3 (1), 37-42, 2020
Mandater: A*Star, Singapore
Exploring low power and ultrafast memristor on p-type van der Waals SnS
XF Lu, Y Zhang, N Wang, S Luo, K Peng, L Wang, H Chen, W Gao, ...
Nano letters 21 (20), 8800-8807, 2021
Mandater: A*Star, Singapore
Ge0.95Sn0.05 Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire Width
Y Kang, S Xu, K Han, EYJ Kong, Z Song, S Luo, A Kumar, C Wang, W Fan, ...
Nano letters 21 (13), 5555-5563, 2021
Mandater: National Research Foundation, Singapore
Germanium-tin multiple quantum well on silicon avalanche photodiode for photodetection at two micron wavelength
Y Dong, W Wang, SY Lee, D Lei, X Gong, WK Loke, SF Yoon, G Liang, ...
Semiconductor Science and Technology 31 (9), 095001, 2016
Mandater: National Research Foundation, Singapore
First monolithic integration of Ge P-FETs and InAs N-FETs on silicon substrate: Sub-120 nm III-V buffer, sub-5 nm ultra-thin body, common raised S/D, and gate stack modules
S Yadav, KH Tan, KH Goh, S Subramanian, KL Low, N Chen, B Jia, ...
2015 IEEE International Electron Devices Meeting (IEDM), 2.3. 1-2.3. 4, 2015
Mandater: National Research Foundation, Singapore
Ultimate performance projection of ultrathin body transistor based on group IV, III-V, and 2-D-materials
KL Low, YC Yeo, G Liang
IEEE Transactions on Electron Devices 63 (2), 773-780, 2016
Mandater: National Research Foundation, Singapore
Gate-All-Around In0.53Ga0.47As Junctionless Nanowire FET With Tapered Source/Drain Structure
KH Goh, S Yadav, KL Low, G Liang, X Gong, YC Yeo
IEEE Transactions on Electron Devices 63 (3), 1027-1033, 2016
Mandater: National Research Foundation, Singapore
Monolithic integration of InAs quantum-well n-MOSFETs and ultrathin body Ge p-MOSFETs on a Si substrate
S Yadav, KH Tan, A Kumar, KH Goh, G Liang, SF Yoon, X Gong, YC Yeo
IEEE Transactions on Electron Devices 64 (2), 353-360, 2016
Mandater: National Research Foundation, Singapore
Gate-all-around CMOS (InAs n-FET and GaSb p-FET) based on vertically-stacked nanowires on a Si platform, enabled by extremely-thin buffer layer technology and common gate stack …
KH Goh, KH Tan, S Yadav, SF Yoon, G Liang, X Gong, YC Yeo
2015 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4, 2015
Mandater: National Research Foundation, Singapore
A surface potential based compact model for two-dimensional field effect transistors with disorders induced transition behaviors
L Wang, Y Li, X Feng, KW Ang, X Gong, AVY Thean, G Liang
Journal of Applied Physics 124 (3), 2018
Mandater: A*Star, Singapore
Nanoscale FETs simulation based on full-complex-band structure and self-consistently solved atomic potential
X Zhang, KT Lam, KL Low, YC Yeo, G Liang
IEEE Transactions on Electron Devices 64 (1), 58-65, 2016
Mandater: National Research Foundation, Singapore
Performance Evaluation and Device Physics Investigation of Negative-Capacitance MOSFETs Based on Ultrathin Body Silicon and Monolayer MoS2
S Luo, X Zhang, G Liang
IEEE Transactions on Electron Devices 67 (8), 3049-3055, 2020
Mandater: National Research Foundation, Singapore
Effects of interlayer interaction in van der Waals layered black phosphorus for sub-10 nm FET
KT Lam, S Luo, B Wang, CH Hsu, A Bansil, H Lin, G Liang
2015 IEEE International Electron Devices Meeting (IEDM), 12.2. 1-12.2. 4, 2015
Mandater: US Department of Energy, National Research Foundation, Singapore
Enabling low power and high speed OEICs: First monolithic integration of InGaAs n-FETs and lasers on Si substrate
A Kumar, SY Lee, S Yadav, KH Tan, WK Loke, D Li, S Wicaksono, ...
2017 Symposium on VLSI Technology, T56-T57, 2017
Mandater: National Research Foundation, Singapore
A Compact Model for 2-D Poly-MoS2 FETs With Resistive Switching in Postsynaptic Simulation
L Wang, L Wang, KW Ang, AVY Thean, G Liang
IEEE Transactions on Electron Devices 66 (9), 4092-4100, 2019
Mandater: A*Star, Singapore
Inherent orbital spin textures in Rashba effect and their implications in spin–orbitronics
MC Hsu, LZ Yao, SG Tan, CR Chang, G Liang, MBA Jalil
Journal of Physics: Condensed Matter 30 (28), 285502, 2018
Mandater: National Research Foundation, Singapore
A Computational Performance Evaluation of Negative-Capacitance MOSFETs based on Ultra-thin body Silicon and Monolayer MoS2
S Luo, X Zhang, G Liang
2019 Electron Devices Technology and Manufacturing Conference (EDTM), 237-239, 2019
Mandater: National Research Foundation, Singapore
A Surface Potential- and Physics- Based Compact Model for 2D Polycrystalline-MoS2FET with Resistive Switching Behavior in Neuromorphic Computing
L Wang, L Wang, KW Ang, AVY Thean, G Liang
2018 IEEE International Electron Devices Meeting (IEDM), 24.5. 1-24.5. 4, 2018
Mandater: A*Star, Singapore
Enabling hetero-integration of III-V and Ge-based transistors on silicon with ultra-thin buffers formed by interfacial misfit technique
X Gong, S Yadav, KH Goh, KH Tan, A Kumar, KL Low, B Jia, SF Yoon, ...
ECS Transactions 75 (8), 421, 2016
Mandater: National Research Foundation, Singapore
Performance evaluation of nanoscale FETs based on full-band complex bandstructure and real space poisson solver
X Zhang, YC Yeo, G Liang
2016 IEEE Silicon Nanoelectronics Workshop (SNW), 204-205, 2016
Mandater: National Research Foundation, Singapore
Informasjon om publisering og finansiering fastsettes automatisk av et datamaskinprogram