| Techniques of impedance matching for minimal PCB channel loss at 40 GBPS signal transmission CF Yee Circuit World, 2019 | 14 | 2019 |
| Advantages and Challenges of 10-Gbps Transmission on High-Density Interconnect Boards CF Yee Journal of Electronic Materials 45 (6), pp 1-8, 2016 | 13 | 2016 |
| Optimized surface mount structure for multi-Gigabit transmission CF Yee IEEE 2nd International Conference on Electronic Design (ICED) 2014, 84 - 88, 2014 | 6 | 2014 |
| Methods of optimized via design for higher channel bandwidth YC Fei IEEE 5th Asia Symposium on Quality Electronic Design (ASQED) 2013, 170-177, 2013 | 6 | 2013 |
| Methodology of power integrity analysis for high speed PCB design CF Yee IEEE 2nd International Conference on Electronic Design (ICED) 2014, 132 - 136, 2014 | 5 | 2014 |
| Achieving Minimal PDN Impedance, SSN and Jitter on PCB with Embedded Capacitance Material CF Yee IEEE International RF and Microwave Conference, 155-158, 2019 | 4 | 2019 |
| Enhancing High Speed Signal Integrity with Optimized Board Level Power Network Design CF Yee Advanced Science Letters 23 (6), 5019–5023, 2017 | 2 | 2017 |
| The Advantages of Substituting Decoupling Capacitors on PWB with Embedded Capacitance Technology CF Yee 2020 IEEE International RF and Microwave Conference (RFM), 1-4, 2021 | 1 | 2021 |
| Essential Board Design Considerations for 1.6GHz DDR4 Transmission CF Yee IEEE International RF and Microwave Conference 2015, 231 - 235, 2015 | 1 | 2015 |
| Study of PWB Metal Surface Roughness Influence on GDDR6 Memory Data Transmission at 16 Gbps CF Yee IEEE ISIEA, 2024 | | 2024 |
| Achieving minimal PWB link loss due to fiber weave influence for multi-Gigabit transmission CF Yee IEEE ISAP, 2024 | | 2024 |
| Paving the Way for 64 Gbps PCIe 6.0 End to End Physical Link Compliance in Multi-board Digital System CF Yee IEEE ISCAIE, 2023 | | 2023 |
| Complementary Technique of Flight Time Compensation for 6.4 Gbps DDR5 Transmission Link on Dense PCB CF Yee IEEE ICEET, 2023 | | 2023 |
| Post-layout Signal Integrity Analysis for 32 Gbps NRZ Serial Transmission using Advanced Design System CF Yee http://dx.doi.org/10.13140/RG.2.2.11322.06083/1, 2022 | | 2022 |
| Crosstalk Noise Alleviation Technique for DDR5 Memory Interface on Compact PWB CF Yee 2021 IEEE Asia-Pacific Conference on Applied Electromagnetics (APACE), 2022 | | 2022 |
| Study of Channel Loss Compensation Scheme for DDR5 SDRAM CF Yee https://www.ednasia.com/study-of-channel-loss-compensation-scheme-for-ddr5 …, 2021 | | 2021 |
| The Impact of Via Structures on Multi-Gigabit Signal Transmission CF Yee http://dx.doi.org/10.13140/RG.2.2.29059.02081, 2021 | | 2021 |
| Essential considerations for effective power rail noise filtering with ferrite beads CF Yee https://www.ednasia.com/essential-considerations-for-effective-power-rail …, 2021 | | 2021 |
| Impact of Transmitted Signal Drive Strength on Crosstalk CF Yee http://dx.doi.org/10.13140/RG.2.2.11409.76648, 2021 | | 2021 |
| Влияние развязывающих конденсаторов на качество электропитания и целостность сигнала CF Yee https://www.researchgate.net/publication …, 2020 | | 2020 |