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Susmita Sur-Kolay
Susmita Sur-Kolay
Professor of Computer Science
Verifisert e-postadresse på isical.ac.in - Startside
Tittel
Sitert av
Sitert av
År
Systematic poisoning attacks on and defenses for machine learning in healthcare
M Mozaffari-Kermani, S Sur-Kolay, A Raghunathan, NK Jha
IEEE journal of biomedical and health informatics 19 (6), 1893-1905, 2014
3612014
Energy-efficient long-term continuous personal health monitoring
AM Nia, M Mozaffari-Kermani, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Multi-Scale Computing Systems 1 (2), 85-98, 2015
1862015
Wearable medical sensor-based system design: A survey
A Mosenia, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Multi-Scale Computing Systems 3 (2), 124-138, 2017
1672017
A modeling approach for addressing power supply switching noise related failures of integrated circuits
C Tirumurti, S Kundu, S Sur-Kolay, YS Chang
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
1002004
CABA: Continuous authentication based on BioAura
A Mosenia, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Computers 66 (5), 759-772, 2016
862016
PAQCS: Physical design-aware fault-tolerant quantum circuit synthesis
CC Lin, S Sur-Kolay, NK Jha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (7 …, 2014
822014
Routing of L-shaped channels, switchboxes and staircases in manhattan-diagonal model
S Das, S Sur-Kolay, BB Bhattacharya
Proceedings Eleventh International Conference on VLSI Design, 65-70, 1998
701998
Linear nearest neighbor synthesis of reversible circuits by graph partitioning
A Chakrabarti, S Sur-Kolay, A Chaudhury
arXiv preprint arXiv:1112.0564, 2011
692011
Physiological information leakage: A new frontier in health information security
AM Nia, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Emerging Topics in Computing 4 (3), 321-334, 2015
652015
Floorplanning for partially reconfigurable FPGAs
P Banerjee, M Sangtani, S Sur-Kolay
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
632010
Secure public verification of IP marks in FPGA design through a zero-knowledge protocol
D Saha, S Sur-Kolay
IEEE transactions on very large scale integration (VLSI) systems 20 (10 …, 2011
462011
Nearest Neighbour based Synthesis of Quantum Boolean Circuits.
A Chakrabarti, S Sur-Kolay
Eng. Lett. 15 (2), 356-361, 2007
432007
Synthesis techniques for ternary quantum logic
SB Mandal, A Chakrabarti, S Sur-Kolay
2011 41st IEEE International Symposium on Multiple-Valued Logic, 218-223, 2011
372011
Fast unified floorplan topology generation and sizing on heterogeneous FPGAs
P Banerjee, S Sur-Kolay, A Bishnu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
342009
Fundamentals of IP and SoC security
S Bhunia, S Ray, S Sur-Kolay
Springer, 2017
322017
Optimizing ansatz design in QAOA for Max-cut
R Majumdar, D Madan, D Bhoumik, D Vinayagamurthy, S Raghunathan, ...
arXiv preprint arXiv:2106.02812, 2021
312021
SoC: a real platform for IP reuse, IP infringement, and IP protection
D Saha, S Sur-Kolay
VLSI Design 2011 (1), 731957, 2011
292011
Asymptotically improved circuit for a -ary Grover's algorithm with advanced decomposition of the -qudit Toffoli gate
A Saha, R Majumdar, D Saha, A Chakrabarti, S Sur-Kolay
Physical Review A 105 (6), 062453, 2022
282022
Quantum error-correcting code for ternary logic
R Majumdar, S Basu, S Ghosh, S Sur-Kolay
Physical Review A 97 (5), 052302, 2018
282018
Combined instruction and loop parallelism in array synthesis for FPGAs
S Derrien, S Rajopadhye, SS Kolay
Proceedings of the 14th international symposium on Systems Synthesis, 165-170, 2001
272001
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Artikler 1–20