Virendra Singh

Virendra Singh

Associate Professor of Electrical Engineering, Indian Institute of Technology Bombay
Verifisert e-postadresse på ee.iitb.ac.in
Sitert av 11457
Computer Architecture VLSI Testing Dependable Systems Design Formal Verification
Moslem Didehban

Moslem Didehban

Arizona State University
Verifisert e-postadresse på asu.edu
Sitert av 337
Dependable Systems Design Hardware Reliability Test and Testability Methods