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Anchal Agarwal
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In Situ Oxide, GaN Interlayer-Based Vertical Trench MOSFET (OG-FET) on Bulk GaN substrates
C Gupta, C Lund, SH Chan, A Agarwal, J Liu, Y Enatsu, S Keller, ...
IEEE Electron Device Letters 38 (3), 353-355, 2017
1732017
Normally OFF trench CAVET with active Mg-doped GaN as current blocking layer
D Ji, MA Laurent, A Agarwal, W Li, S Mandal, S Keller, S Chowdhury
IEEE Transactions on Electron Devices 64 (3), 805-808, 2016
1032016
880 V/MIS Gate Trench CAVET on Bulk GaN Substrates
D Ji, A Agarwal, H Li, W Li, S Keller, S Chowdhury
IEEE Electron Device Letters 39 (6), 863-865, 2018
912018
OG-FET: An In-Situ xide, aN Interlayer-Based Vertical Trench MOSFET
C Gupta, SH Chan, Y Enatsu, A Agarwal, S Keller, UK Mishra
IEEE Electron Device Letters 37 (12), 1601-1604, 2016
832016
Demonstrating> 1.4 kV OG-FET performance with a novel double field-plated geometry and the successful scaling of large-area devices
D Ji, C Gupta, SH Chan, A Agarwal, W Li, S Keller, UK Mishra, ...
2017 IEEE International Electron Devices Meeting (IEDM), 9.4. 1-9.4. 4, 2017
722017
Large-Area In-Situ Oxide, GaN Interlayer-Based Vertical Trench MOSFET (OG-FET)
D Ji, C Gupta, A Agarwal, SH Chan, C Lund, W Li, S Keller, UK Mishra, ...
IEEE Electron Device Letters 39 (5), 711-714, 2018
682018
Comparing electrical performance of GaN trench-gate MOSFETs with a-plane and m-plane sidewall channels
C Gupta, SH Chan, C Lund, A Agarwal, OS Koksaldi, J Liu, Y Enatsu, ...
Applied Physics Express 9 (12), 121001, 2016
582016
Dispersion free 450-V p GaN-gated CAVETs with Mg-ion implanted blocking layer
S Mandal, A Agarwal, E Ahmadi, KM Bhat, D Ji, MA Laurent, S Keller, ...
IEEE Electron Device Letters 38 (7), 933-936, 2017
522017
First demonstration of AlSiO as gate dielectric in GaN FETs; applied to a high performance OG-FET
C Gupta, SH Chan, A Agarwal, N Hatui, S Keller, UK Mishra
IEEE Electron Device Letters 38 (11), 1575-1578, 2017
492017
Demonstration of GaN current aperture vertical electron transistors with aperture region formed by ion implantation
D Ji, A Agarwal, W Li, S Keller, S Chowdhury
IEEE Transactions on Electron Devices 65 (2), 483-487, 2018
422018
Improved Dynamic RON of GaN Vertical Trench MOSFETs (OG-FETs) Using TMAH Wet Etch
D Ji, W Li, A Agarwal, SH Chan, J Haller, D Bisi, M Labrecque, C Gupta, ...
IEEE Electron Device Letters 39 (7), 1030-1033, 2018
352018
Suppression of Mg propagation into subsequent layers grown by MOCVD
A Agarwal, M Tahhan, T Mates, S Keller, U Mishra
Journal of Applied Physics 121 (2), 2017
312017
First demonstration of RF N-polar GaN MIS-HEMTs grown on bulk GaN using PAMBE
SS Pasayat, E Ahmadi, B Romanczyk, O Koksaldi, A Agarwal, M Guidry, ...
Semiconductor Science and Technology 34 (4), 045009, 2019
252019
Controlled low Si doping and high breakdown voltages in GaN on sapphire grown by MOCVD
A Agarwal, C Gupta, Y Enatsu, S Keller, U Mishra
Semiconductor Science and Technology 31 (12), 125018, 2016
202016
Electro-thermal investigation of GaN vertical trench MOSFETs
B Chatterjee, D Ji, A Agarwal, SH Chan, S Chowdhury, S Choi
IEEE Electron Device Letters 42 (5), 723-726, 2021
172021
Impact of trench dimensions on the device performance of GaN vertical trench MOSFETs
C Gupta, D Ji, SH Chan, A Agarwal, W Leach, S Keller, S Chowdhury, ...
IEEE Electron Device Letters 38 (11), 1559-1562, 2017
152017
Investigation of Mg -doping for low resistance N-polar p-GaN films grown at reduced temperatures by MOCVD
C Lund, A Agarwal, B Romanczyk, T Mates, S Nakamura, S DenBaars, ...
Coumpound Semiconductor Week, Boston, 2018
14*2018
1 kV Field-Plated In-Situ Oxide, GaN interlayer based vertical trench MOSFET (OG-FET)
C Gupta, A Agarwal, SH Chan, OS Koksaldi, S Keller, UK Mishra
Device Research Conference, South Bend, Indiana, 2017
142017
First report of scaling a normally-off In-Situ Oxide, GaN interlayer based vertical trench MOSFET (OG-FET)
D Ji, C Gupta, A Agarwal, SH Chan, C Lund, M Laurent, W Li, S Keller, ...
Device Research Conference, South Bend, Indiana, 2017
122017
Schottky Junction Vertical Channel GaN Static Induction Transistor with a Sub‐Micrometer Fin Width
J Chun, W Li, A Agarwal, S Chowdhury
Advanced Electronic Materials 5 (1), 1800689, 2019
102019
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Artikelen 1–20