| Design and analysis of ring oscillator based design-for-trust technique J Rajendran, V Jyothi, O Sinanoglu, R Karri 29th VLSI Test Symposium, 105-110, 2011 | 110 | 2011 |
| Brain: Behavior based adaptive intrusion detection in networks: Using hardware performance counters to detect ddos attacks V Jyothi, X Wang, SK Addepalli, R Karri 2016 29th international conference on VLSI design and 2016 15th …, 2016 | 75 | 2016 |
| Blue team red team approach to hardware trust assessment J Rajendran, V Jyothi, R Karri 2011 IEEE 29th international conference on computer design (ICCD), 285-288, 2011 | 45 | 2011 |
| System, method and computer-accessible medium for network intrusion detection SK Addepalli, R Karri, V Jyothi US Patent 10,735,438, 2020 | 40 | 2020 |
| Ring oscillator based design-for-trust V Jyothi, R Karri, J Rajendran, O Sinanoglu US Patent 9,081,991, 2015 | 23 | 2015 |
| FPGA Trust Zone: Incorporating Trust and Reliability into FPGA Designs RSRK Vinayaka Jyothi, Manasa Thoonoli 34th IEEE International Conference on Computer Design (ICCD), 2016 | 22 | 2016 |
| Intra-die process variation aware anomaly detection in FPGAs Y Pino, V Jyothi, M French 2014 International Test Conference, 1-6, 2014 | 21 | 2014 |
| Taint: Tool for automated insertion of trojans V Jyothi, P Krishnamurthy, F Khorrami, R Karri 2017 IEEE International Conference on Computer Design (ICCD), 545-548, 2017 | 18 | 2017 |
| DPFEE: A high performance scalable pre-processor for network security systems V Jyothi, SK Addepalli, R Karri IEEE Transactions on Multi-Scale Computing Systems 4 (1), 55-68, 2017 | 18 | 2017 |
| Hardware Trojan attacks in FPGA and protection approaches V Jyothi, J Rajendran The hardware Trojan war: Attacks, myths, and defenses, 345-368, 2018 | 16 | 2018 |
| Deep packet field extraction engine (DPFEE): A pre-processor for network intrusion detection and denial-of-service detection systems V Jyothi, SK Addepalli, R Karri 2015 33rd IEEE International Conference on Computer Design (ICCD), 266-272, 2015 | 15 | 2015 |
| Fingerprinting field programmable gate arrays V Jyothi, A Poojari, R Stern, R Karri 2017 IEEE International Conference on Computer Design (ICCD), 337-340, 2017 | 11 | 2017 |
| Real-time customizable AI model collaboration and marketplace service over a trusted AI model network SK Addepalli US Patent 11,423,454, 2022 | 8 | 2022 |
| Systems and methods for artificial intelligence hardware processing SK Addepalli, V Jyothi, AH Poojari US Patent App. 16/528,543, 2020 | 7 | 2020 |
| Systems and methods of security for trusted artificial intelligence hardware processing SK Addepalli US Patent 11,507,662, 2022 | 6 | 2022 |
| Systems and methods for power management of hardware utilizing virtual multilane architecture SK Addepalli US Patent 11,150,720, 2021 | 3 | 2021 |
| Systems and methods for artificial intelligence with a flexible hardware processing framework SK Addepalli US Patent 11,544,525, 2023 | 2 | 2023 |
| Secure and trusted multi-tenant service delivery platform for distributed multitenant-capable ai solution model compute processors SK Addepalli, V Jyothi, AH Poojari US Patent App. 16/789,371, 2020 | 2 | 2020 |
| Lightweight, highspeed and energy efficient asynchronous and file system-based ai processing interface framework SK Addepalli, V Jyothi, AH Poojari US Patent App. 16/528,551, 2020 | 2 | 2020 |
| Systems and methods for continuous & real-time ai adaptive sense learning SK Addepalli, V Jyothi, AH Poojari US Patent App. 16/528,549, 2020 | | 2020 |
Ramesh Karri కర్రి రమేష్Professor of Electrical and Computer Engineering, New York UniversityGeverifieerd e-mailadres voor nyu.edu