| Hardware and embedded security in the context of internet of things A Kanuparthi, R Karri, S Addepalli Proceedings of the 2013 ACM workshop on Security, privacy & dependability …, 2013 | 167 | 2013 |
| {HardFails}: insights into {software-exploitable} hardware bugs G Dessouky, D Gens, P Haney, G Persyn, A Kanuparthi, H Khattri, ... 28th USENIX Security Symposium (USENIX Security 19), 213-230, 2019 | 128 | 2019 |
| MAGIC: Malicious Aging in Circuits/Cores N Karimi, A Kanuparthi, X Wang, R Karri, O Sinanoglu Transactions on Architecture and Code Optimization, 2015 | 53 | 2015 |
| Securing processors against insider attacks: A circuit-microarchitecture co-design approach J Rajendran, AK Kanuparthi, M Zahran, SK Addepalli, G Ormazabal, ... IEEE Design & Test 30 (2), 35-44, 2013 | 40 | 2013 |
| Rtl-contest: Concolic testing on rtl for detecting security vulnerabilities X Meng, S Kundu, AK Kanuparthi, K Basu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 30 | 2021 |
| Architecture support for dynamic integrity checking AK Kanuparthi, M Zahran, R Karri IEEE Transactions on Information Forensics and Security 7 (1), 321-332, 2011 | 26 | 2011 |
| Techniques for Preventing Memory Timing Attacks A Kanuparthi, N Kodalapura US Patent 10,116,436, 2018 | 23* | 2018 |
| A high-performance, low-overhead microarchitecture for secure program execution AK Kanuparthi, R Karri, G Ormazabal, SK Addepalli 2012 IEEE 30th International Conference on Computer Design (ICCD), 102-107, 2012 | 23 | 2012 |
| Feasibility study of dynamic trusted platform module AK Kanuparthi, M Zahran, R Karri 2010 IEEE International Conference on Computer Design, 350-355, 2010 | 20 | 2010 |
| Formal verification of security critical hardware-firmware interactions in commercial SoCs S Ray, N Ghosh, RJ Masti, A Kanuparthi, JM Fung Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019 | 17 | 2019 |
| Did we learn from LLC Side Channel Attacks? A Cache Leakage Detection Tool for Crypto Libraries G Irazoqui, K Cong, X Guo, H Khattri, A Kanuparthi, T Eisenbarth, B Sunar ArXiv, 2017 | 17 | 2017 |
| Hardware based technique to prevent critical fine-grained cache side-channel attacks A Basak, A Kanuparthi, NN Kodalapura, JM Fung US Patent 11,144,468, 2021 | 13 | 2021 |
| Controlling Your Control Flow Graph A Kanuparthi, J Rajendran, R Karri Hardware Oriented Security and Trust, 6, 2016 | 11 | 2016 |
| A survey of microarchitecture support for embedded processor security AK Kanuparthi, R Karri, G Ormazabal, SK Addepalli 2012 IEEE Computer Society Annual Symposium on VLSI, 368-373, 2012 | 9 | 2012 |
| Did we learn from LLC side channel attacks G Irazoqui, K Cong, X Guo, H Khattri, AK Kanuparthi, T Eisenbarth, ... A Cache Leakage Detection Tool for Crypto Libraries. arXiv abs/1709.01552, 2017 | 7 | 2017 |
| Reliable Integrity Checking in Multicore Processors A Kanuparthi, R Karri ACM Transactions on Architecture and Code Optimization (TACO), 23, 2015 | 7 | 2015 |
| When a patch is not enough-hardfails: Software-exploitable hardware bugs G Dessouky, D Gens, P Haney, G Persyn, A Kanuparthi, H Khattri, ... arXiv preprint arXiv:1812.00197, 2018 | 5 | 2018 |
| AntiDOTE: Protecting Debug Against Outsourced Test Entities N Limaye, C Wachsmann, M Nabeel, M Ashraf, A Kanuparthi, ... IEEE Transactions on Emerging Topics in Computing 10 (3), 1507-1518, 2021 | 4 | 2021 |
| Carry-Out Interference Optimization in WCRT Analysis for Global Fixed-Priority Multiprocessor Scheduling.................. H An, MS Al-Mamun, MK Orlowski, L Liu, Y Yi, K Chang, S Sinha, B Cline, ... | 2 | |
| Techniques for preventing memory timing attacks NN Kodalapura, A Kanuparthi US Patent 11,121,853, 2021 | 1 | 2021 |
Ramesh Karri కర్రి రమేష్Professor of Electrical and Computer Engineering, New York UniversityGeverifieerd e-mailadres voor nyu.edu