| Power-Analysis Attack on an ASIC AES implementation SB Ors, F Gürkaynak, E Oswald, B Preneel Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004 …, 2004 | 348 | 2004 |
| Power-Analysis Attack on an ASIC AES implementation SB Ors, F Gurkaynak, E Oswald, B Preneel Embedded Cryptographic Hardware:Design and Security, 2004 | 348 | 2004 |
| Power-Analysis Attack onan ASIC AES implementation SB Ors, F Gurkaynak, E Oswald, B Preneel Embedded Cryptographic Hardware:Design and Security, 2004 | 348* | 2004 |
| Power-analysis attacks on an FPGA–first experimental results S Ors, E Oswald, B Preneel Cryptographic Hardware and Embedded Systems-CHES 2003, 35-50, 2003 | 236 | 2003 |
| Electromagnetic analysis attack on an FPGA implementation of an elliptic curve cryptosystem E De Mulder, P Buysschaert, SB Ors, P Delmotte, B Preneel, ... Proceedings of EUROCON 10 (2), 1879-1882, 2005 | 181* | 2005 |
| Wireless security and cryptography: specifications and implementations N Sklavos, M Manninger, X Zhang, O Koufopavlou, V Hassler, P Kitsos, ... CRC press, 2017 | 173 | 2017 |
| Hardware architectures for public key cryptography L Batina, SB Ors, B Preneel, J Vandewalle Integration, the VLSI journal 34 (1), 1-64, 2003 | 166 | 2003 |
| Power Analysis attack on an FPGA implementation of AES FX Standaert, SB Ors, B Preneel Cryptographic Hardware and Embedded Systems-CHES 2004, 30-44, 2004 | 161* | 2004 |
| Hardware implementation of an elliptic curve processor over GF (p) SB Ors, L Batina, B Preneel, J Vandewalle Application-Specific Systems, Architectures, and Processors, 2003 …, 2003 | 149 | 2003 |
| Hardware implementation of a Montgomery modular multiplier in a systolic array SB Ors, L Batina, B Preneel, J Vandewalle Parallel and Distributed Processing Symposium, 2003. Proceedings …, 2003 | 102 | 2003 |
| RPL version number attacks: In-depth study A Aris, SF Oktug, SBO Yalcin NOMS 2016-2016 IEEE/IFIP Network Operations and Management Symposium, 776-779, 2016 | 90 | 2016 |
| Energy, performance, area versus security trade-offs for stream ciphers L Batina, J Lano, N Mentens, SB Ors, B Preneel, I Verbauwhede Brugge:[Sn], 2004 | 90 | 2004 |
| Power analysis attacks against FPGA implementations of the DES FX Standaert, S Ors, JJ Quisquater, B Preneel Field Programmable Logic and Application, 84-94, 2004 | 87 | 2004 |
| Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems E De Mulder, SB Örs, B Preneel, I Verbauwhede Computers & Electrical Engineering 33 (5), 367-382, 2007 | 79 | 2007 |
| Privacy-friendly authentication in RFID systems: on sublinear protocols based on symmetric-key cryptography G Avoine, MA Bingöl, X Carpent, SBO Yalcin IEEE Transactions on Mobile Computing 12 (10), 2037-2049, 2012 | 71 | 2012 |
| New lightweight mitigation techniques for RPL version number attacks A Arış, SBÖ Yalçın, SF Oktuğ Ad Hoc Networks 85, 81-91, 2019 | 70 | 2019 |
| Low-cost implementations of NTRU for pervasive security AC Atici, L Batina, J Fan, I Verbauwhede, SB Ors The IEEE International Conference on Application-Specific Systems …, 2008 | 68 | 2008 |
| An FPGA implementation of an elliptic curve processor GF(2m) N Mentens, SB Ors, B Preneel Proceedings of the 14th ACM Great Lakes symposium on VLSI, 454-457, 2004 | 60 | 2004 |
| Internet-of-Things security: Denial of service attacks A Arış, SF Oktuğ, SBÖ Yalçın 2015 23nd Signal Processing and Communications Applications Conference (SIU …, 2015 | 54 | 2015 |
| Security and performance analysis of ARIA A Biryukov, C De Canniere, J Lano, SB Ors, B Preneel Final report, KU Leuven ESAT/SCD-COSIC 3, 4, 2004 | 50 | 2004 |
Bart PreneelProfessor, KU Leuvenesat.kuleuven.be의 이메일 확인됨