| Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 7) RNM Watson, PG Neumann, J Woodruff, M Roe, H Almatary, J Anderson, ... https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-927.pdf, 2019 | 142 | 2019 |
| Clean application compartmentalization with SOAAP K Gudka, RNM Watson, J Anderson, D Chisnall, B Davis, B Laurie, ... Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications …, 2015 | 110 | 2015 |
| CheriABI: Enforcing valid pointer provenance and minimizing pointer privilege in the POSIX C run-time environment B Davis, RNM Watson, A Richardson, PG Neumann, SW Moore, ... Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 93 | 2019 |
| Cherivoke: Characterising pointer revocation using cheri capabilities for temporal memory safety H Xia, J Woodruff, S Ainsworth, NW Filardo, M Roe, A Richardson, ... Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 88 | 2019 |
| Cornucopia: Temporal safety for CHERI heaps NW Filardo, BF Gutstein, J Woodruff, S Ainsworth, L Paul-Trifu, B Davis, ... 2020 IEEE Symposium on Security and Privacy (SP), 608-625, 2020 | 86 | 2020 |
| Efficient tagged memory A Joannou, J Woodruff, R Kovacsics, SW Moore, A Bradbury, H Xia, ... 2017 IEEE International Conference on Computer Design (ICCD), 641-648, 2017 | 84 | 2017 |
| Exploring C semantics and pointer provenance K Memarian, VBF Gomes, B Davis, S Kell, A Richardson, RNM Watson, ... Proceedings of the ACM on Programming Languages 3 (POPL), 1-32, 2019 | 83 | 2019 |
| Cheri c/c++ programming guide RNM Watson, A Richardson, B Davis, J Baldwin, D Chisnall, J Clarke, ... University of Cambridge, Computer Laboratory, 2020 | 39 | 2020 |
| Cherirtos: A capability model for embedded devices H Xia, J Woodruff, H Barral, L Esswood, A Joannou, R Kovacsics, ... 2018 IEEE 36th International Conference on Computer Design (ICCD), 92-99, 2018 | 30 | 2018 |
| Complete spatial safety for C and C++ using CHERI capabilities A Richardson University of Cambridge, Computer Laboratory, 2020 | 25 | 2020 |
| Separating translation from protection in address spaces with dynamic remapping R Achermann, C Dalton, P Faraboschi, M Hoffmann, D Milojicic, G Ndu, ... Proceedings of the 16th Workshop on Hot Topics in Operating Systems, 118-124, 2017 | 19 | 2017 |
| Assessing the Viability of an Open-Source CHERI Desktop Software Ecosystem RNM Watson, B Laurie, A Richardson https://www.capabilitieslimited.co.uk/pdfs/20210917-capltd-cheri-desktop …, 2021 | 14 | 2021 |
| Early performance results from the prototype Morello microarchitecture RNM Watson, J Clarke, P Sewell, J Woodruff, SW Moore, G Barnes, ... University of Cambridge, Computer Laboratory, 2023 | 9 | 2023 |
| Formal Mechanised Semantics of CHERI C: Capabilities, Undefined Behaviour, and Provenance V Zaliva, K Memarian, R Almeida, J Clarke, B Davis, A Richardson, ... Proceedings of the 29th ACM International Conference on Architectural …, 2024 | 8 | 2024 |
| Clean application compartmentalization with SOAAP (extended version) K Gudka, RNM Watson, J Anderson, D Chisnall, B Davis, B Laurie, ... University of Cambridge, Computer Laboratory, 2015 | 7 | 2015 |
| Memory-side protection with a capability enforcement co-processor L Azriel, L Humbel, R Achermann, A Richardson, M Hoffmann, ... ACM Transactions on Architecture and Code Optimization (TACO) 16 (1), 1-26, 2019 | 5 | 2019 |
| Department of computer science and technology L Wang, G Tyson, J Kangasharju, J Crowcroft, S Bayhan, J Ott, ... IEEE Transactions on Big Data, 2016 | 5 | 2016 |
| Capability based locking and access of shared persistent memory AL Richardson, MJ Hoffmann, DS Milojicic US Patent 10,628,057, 2020 | 3 | 2020 |
| Memory system and handles to master capabilities DS Milojicic, MJ Hoffmann, A Richardson, Q Cai US Patent 10,387,335, 2019 | 3 | 2019 |
| CHERI: Hardware-enabled C/C++ memory protection at scale RNM Watson, D Chisnall, J Clarke, B Davis, NW Filardo, B Laurie, ... IEEE Security & Privacy, 2024 | 2 | 2024 |
Robert N. M. WatsonDepartment of Computer Science and Technology, University of Cambridge確認したメール アドレス: cl.cam.ac.uk
