| Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum … EC Stevens, B Zope, S Swaminathan, C Dezelah, Q Xie, GA Verni US Patent 11,286,558, 2022 | 258 | 2022 |
| Method of forming vanadium nitride layer and structure including the vanadium nitride layer GA Verni, Q Xie, H Jussila, C Dezelah, J Kim, EJ Shero, P Ma US Patent 11,885,013, 2024 | 226 | 2024 |
| Method of forming chromium nitride layer and structure including the chromium nitride layer Q Xie, EJ Shero, C Dezelah, GA Verni, P Raisanen US Patent 12,087,586, 2024 | 224 | 2024 |
| Method of forming structures including a vanadium or indium layer EJ Shero, ME Givens, Q Xie, C Dezelah, GA Verni US Patent 11,521,851, 2022 | 224 | 2022 |
| Organo-arsenic molecular layers on silicon for high-density doping J O’Connell, GA Verni, A Gangnaik, M Shayesteh, B Long, YM Georgiev, ... ACS applied materials & interfaces 7 (28), 15514-15521, 2015 | 50 | 2015 |
| Rapid, low-temperature synthesis of germanium nanowires from oligosilylgermane precursors M Aghazadeh Meshgi, S Biswas, D McNulty, C O’Dwyer, G Alessio Verni, ... Chemistry of Materials 29 (10), 4351-4360, 2017 | 29 | 2017 |
| Molecular Layer Doping: Non-destructive doping of silicon and germanium B Long, GA Verni, J O'Connell, J Holmes, M Shayesteh, D O'Connell, ... 2014 20th International Conference on Ion Implantation Technology (IIT), 1-4, 2014 | 27 | 2014 |
| Oxide removal and stabilization of bismuth thin films through chemically bound thiol layers GA Verni, B Long, F Gity, M Lanius, P Schüffelgen, G Mussler, ... RSC Advances 8 (58), 33368-33373, 2018 | 26 | 2018 |
| Metal-semimetal Schottky diode relying on quantum confinement F Gity, L Ansari, C König, GA Verni, JD Holmes, B Long, M Lanius, ... Microelectronic Engineering 195, 21-25, 2018 | 20 | 2018 |
| Doping top-down e-beam fabricated germanium nanowires using molecular monolayers B Long, GA Verni, J O’Connell, M Shayesteh, A Gangnaik, YM Georgiev, ... Materials Science in Semiconductor Processing 62, 196-200, 2017 | 20 | 2017 |
| Dipole-first gate stack as a scalable and thermal budget flexible multi-Vt solution for nanosheet/CFET devices H Arimura, LÅ Ragnarsson, Y Oniki, J Franco, A Vandooren, S Brus, ... 2021 IEEE International Electron Devices Meeting (IEDM), 13.5. 1-13.5. 4, 2021 | 9 | 2021 |
| Selective deposition of silicon oxide on dielectric surfaces relative to metal surfaces A Illiberi, GA Verni, S Deng, D Chiappe, E Tois, M Tuominen, M Givens US Patent 11,898,240, 2024 | 6 | 2024 |
| Molybdenum nitride as a scalable and thermally stable pWFM for CFET H Arimura, S Brus, J Franco, Y Oniki, A Vandooren, T Conard, BT Chan, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 3 | 2023 |
| Methods and systems for filling a gap E Färm, S Iwashita, C Dezelah, JW Maes, T Blanquart, RHJ Vervuurt, ... US Patent App. 17/680,711, 2022 | 3 | 2022 |
| Method of forming structures for threshold voltage control Q Xie, GA Verni, T Ivanova, P Sippola, ME Givens, E Shero, J Kim, ... US Patent App. 17/529,562, 2022 | 2 | 2022 |
| Selective deposition of metal oxides on metal surfaces A Illiberi, ME Givens, S Deng, GA Verni US Patent 11,965,238, 2024 | 1 | 2024 |
| Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element D Pierreux, B Jongbloed, Q Xie, GA Verni US Patent 11,887,857, 2024 | 1 | 2024 |
| Selective deposition of silicon oxide on metal surfaces A Illiberi, GA Verni, S Deng, D Chiappe, E Tois, M Tuominen, M Givens US Patent 11,643,720, 2023 | 1 | 2023 |
| Methods and systems for forming a layer comprising a transitional metal and a group 13 element M Van Druenen, Q Xie, C Dezelah, P Deminskyi, L Chen, GA Verni, ... US Patent 12,031,206, 2024 | | 2024 |
| Vt Fine-Tuning in Multi-Vt Gate-All-Around Nanosheet nFETs Using Rare-Earth Oxide-Based Dipole-First Gate Stack Compatible with CFET Integration H Arimura, H Mertens, J Franco, L Lukose, W Maqsood, S Brus, ... 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024 | | 2024 |
John O'ConnellR&D Process Engineer at Alcon確認したメール アドレス: alcon.com