Sampling with hammersley and halton points TT Wong, WS Luk, PA Heng Journal of graphics tools 2 (2), 9-24, 1997 | 352 | 1997 |
Two new quorum based algorithms for distributed mutual exclusion WS Luk, TT Wong Proceedings of 17th International Conference on Distributed Computing …, 1997 | 247 | 1997 |
Handling soft modules in general nonslicing floorplan using Lagrangian relaxation FY Young, CCN Chu, WS Luk, YC Wong IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001 | 63 | 2001 |
Layout decomposition with pairwise coloring for multiple patterning lithography Y Zhang, WS Luk, H Zhou, C Yan, X Zeng 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 170-177, 2013 | 58 | 2013 |
An efficient iterative pose estimation algorithm SH Or, WS Luk, KH Wong, I King Image and Vision Computing 16 (5), 353-362, 1998 | 58 | 1998 |
Convergence-Theoretics of Classical and Krylov Waveform Relaxation Methods for Differential= Algebraic Equations YL JIANG, WS LUK, O WING IEICE transactions on fundamentals of electronics, communications and …, 1997 | 33 | 1997 |
Floorplan area minimization using Lagrangian relaxation FY Young, CCN Chu, WS Luk, YC Wong Proceedings of the 2000 international symposium on Physical design, 174-179, 2000 | 26 | 2000 |
Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography Y Yang, WS Luk, DZ Pan, H Zhou, C Yan, D Zhou, X Zeng IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 23 | 2015 |
Fast and lossless graph division method for layout decomposition using SPQR-tree WS Luk, H Huang 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 112-115, 2010 | 17 | 2010 |
Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays Y Wang, WS Luk, X Zeng, J Tao, C Yan, J Tong, W Cai, J Ni Proceedings of the 45th annual Design Automation Conference, 223-226, 2008 | 17 | 2008 |
Finding roots of a real polynomial simultaneously by means of Bairstow's method WS Luk BIT Numerical Mathematics 36, 302-308, 1996 | 15 | 1996 |
Parallel join algorithms on a network of workstations X Wang, WS Luk Proceedings International Symposium on Databases in Parallel and Distributed …, 1988 | 14 | 1988 |
Full-kv: Flexible and ultra-low-latency in-memory key-value store system design on cpu-fpga Y Qiu, J Xie, H Lv, W Yin, WS Luk, L Wang, B Yu, H Chen, X Ge, Z Liao, ... IEEE Transactions on Parallel and Distributed Systems 31 (8), 1828-1444, 2020 | 13 | 2020 |
Characterizing intra-die spatial correlation using spectral density method Q Fu, WS Luk, J Tao, C Yan, X Zeng Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on …, 2008 | 12 | 2008 |
LETA: A lightweight exchangeable-track accelerator for efficientnet based on FPGA J Gao, Y Qian, Y Hu, X Fan, WS Luk, W Cao, L Wang 2021 International Conference on Field-Programmable Technology (ICFPT), 1-9, 2021 | 11 | 2021 |
DME-based clock routing in the presence of obstacles H Huang, WS Luk, W Zhao, X Zeng 2007 7th International Conference on ASIC, 1225-1228, 2007 | 11 | 2007 |
Wcomp: Waveform comparison tool for mixed-signal validation regression in memory design P Zhang, WS Luk, Y Song, J Tong, P Tang, X Zeng 2007 Asia and South Pacific Design Automation Conference, 209-214, 2007 | 11 | 2007 |
An effective layout decomposition method for DSA with multiple patterning in contact-hole generation Y Yang, WS Luk, H Zhou, DZ Pan, D Zhou, C Yan, X Zeng ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (1 …, 2017 | 9 | 2017 |
An efficient algorithm for multi-domain clock skew scheduling Y Zhi, WS Luk, H Zhou, C Yan, H Zhu, X Zeng Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 1-6, 2011 | 9 | 2011 |
Robust analog circuit sizing using ellipsoid method and affine arithmetic X Liu, WS Luk, Y Song, P Tang, X Zeng 2007 Asia and South Pacific Design Automation Conference, 203-208, 2007 | 6 | 2007 |