| SCNN: An accelerator for compressed-sparse convolutional neural networks A Parashar, M Rhu, A Mukkara, A Puglielli, R Venkatesan, B Khailany, ... ACM SIGARCH computer architecture news 45 (2), 27-40, 2017 | 1530 | 2017 |
| vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design M Rhu, N Gimelshein, J Clemons, A Zulfiqar, SW Keckler 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 540 | 2016 |
| Tensordimm: A practical near-memory processing architecture for embeddings and tensor operations in deep learning Y Kwon, Y Lee, M Rhu Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 251 | 2019 |
| Compressing DMA engine: Leveraging activation sparsity for training deep neural networks M Rhu, M O'Connor, N Chatterjee, J Pool, Y Kwon, SW Keckler 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 245 | 2018 |
| A locality-aware memory hierarchy for energy-efficient GPU architectures M Rhu, M Sullivan, J Leng, M Erez Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 173 | 2013 |
| Bts: An accelerator for bootstrappable fully homomorphic encryption S Kim, J Kim, MJ Kim, W Jung, J Kim, M Rhu, JH Ahn Proceedings of the 49th annual international symposium on computer …, 2022 | 167 | 2022 |
| Prema: A predictive multi-task scheduling algorithm for preemptible neural processing units Y Choi, M Rhu 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 154 | 2020 |
| Centaur: A chiplet-based, hybrid sparse-dense accelerator for personalized recommendations R Hwang, T Kim, Y Kwon, M Rhu 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 131 | 2020 |
| Architecting an energy-efficient dram system for gpus N Chatterjee, M O’Connor, D Lee, DR Johnson, SW Keckler, M Rhu, ... 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 121 | 2017 |
| Priority-based cache allocation in throughput processors D Li, M Rhu, DR Johnson, M O'Connor, M Erez, D Burger, DS Fussell, ... 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 120 | 2015 |
| Ark: Fully homomorphic encryption accelerator with runtime data generation and inter-operation key reuse J Kim, G Lee, S Kim, G Sohn, M Rhu, J Kim, JH Ahn 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022 | 104 | 2022 |
| The dual-path execution model for efficient GPU control flow M Rhu, M Erez 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 96 | 2013 |
| Beyond the memory wall: A case for memory-centric hpc system for deep learning Y Kwon, M Rhu 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 93 | 2018 |
| CAPRI: Prediction of compaction-adequacy for handling control-divergence in GPGPU architectures M Rhu, M Erez ACM SIGARCH Computer Architecture News 40 (3), 61-71, 2012 | 88 | 2012 |
| Maximizing SIMD resource utilization in GPGPUs with SIMD lane permutation M Rhu, M Erez Proceedings of the 40th Annual International Symposium on Computer …, 2013 | 72 | 2013 |
| Lazy batching: An SLA-aware batching system for cloud machine learning inference Y Choi, Y Kim, M Rhu 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 69 | 2021 |
| TRiM: Enhancing processor-memory interfaces with scalable tensor reduction in memory J Park, B Kim, S Yun, E Lee, M Rhu, JH Ahn MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 64 | 2021 |
| Smartsage: training large-scale graph neural networks using in-storage processing architectures Y Lee, J Chung, M Rhu Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 49 | 2022 |
| Tensor casting: Co-designing algorithm-architecture for personalized recommendation training Y Kwon, Y Lee, M Rhu 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 49 | 2021 |
| GPUVolt: Modeling and characterizing voltage noise in GPU architectures J Leng, Y Zu, M Rhu, M Gupta, VJ Reddi Proceedings of the 2014 international symposium on Low power electronics and …, 2014 | 47 | 2014 |
Steve KecklerVice President of Architecture Research, NVIDIAכתובת אימייל מאומתת בדומיין cs.utexas.edu