A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS Y Zhu, CH Chan, UF Chio, SW Sin, U Seng-Pan, RP Martins, F Maloberti IEEE Journal of Solid-state circuits 45 (6), 1111-1121, 2010 | 752 | 2010 |
Transceiver architecture selection–review, state-of-the-art survey and case study PI Mak, SP U, RP Martins Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage …, 2007 | 226 | 2007 |
A fully integrated digital LDO with coarse–fine-tuning and burst-mode operation M Huang, Y Lu, SW Sin, U Seng-Pan, RP Martins IEEE Transactions on Circuits and Systems II: Express Briefs 63 (7), 683-687, 2016 | 183 | 2016 |
A wide input range dual-path CMOS rectifier for RF energy harvesting Y Lu, H Dai, M Huang, MK Law, SW Sin, U Seng-Pan, RP Martins IEEE Transactions on Circuits and Systems II: Express Briefs 64 (2), 166-170, 2016 | 182 | 2016 |
An analog-assisted tri-loop digital low-dropout regulator M Huang, Y Lu, U Seng-Pan, RP Martins IEEE Journal of Solid-State Circuits 53 (1), 20-34, 2017 | 127 | 2017 |
An 8-b 400-MS/s 2-b-per-cycle SAR ADC with resistive DAC H Wei, CH Chan, UF Chio, SW Sin, U Seng-Pan, RP Martins, F Maloberti IEEE Journal of Solid-State Circuits 47 (11), 2763-2772, 2012 | 122 | 2012 |
A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS H Wei, CH Chan, UF Chio, SW Sin, U Seng-Pan, R Martins, F Maloberti 2011 IEEE International Solid-State Circuits Conference, 188-190, 2011 | 99 | 2011 |
Enhanced hydrogen generation by hydrolysis of Mg doped with flower-like MoS2 for fuel cell applications M Huang, L Ouyang, J Liu, H Wang, H Shao, M Zhu Journal of Power Sources 365, 273-281, 2017 | 93 | 2017 |
20.4 An output-capacitor-free analog-assisted digital low-dropout regulator with tri-loop control M Huang, Y Lu, U Seng-Pan, RP Martins 2017 IEEE International Solid-State Circuits Conference (ISSCC), 342-343, 2017 | 87 | 2017 |
A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS CH Chan, Y Zhu, UF Chio, SW Sin, U Seng-Pan, RP Martins IEEE Asian Solid-State Circuits Conference 2011, 233-236, 2011 | 87 | 2011 |
Split-SAR ADCs: Improved linearity with power and speed optimization Y Zhu, CH Chan, UF Chio, SW Sin, U Seng-Pan, RP Martins, F Maloberti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 372-383, 2013 | 84 | 2013 |
A two-way interleaved 7-b 2.4-GS/s 1-then-2 b/cycle SAR ADC with background offset calibration CH Chan, Y Zhu, WH Zhang, U Seng-Pan, RP Martins IEEE Journal of Solid-State Circuits 53 (3), 850-860, 2018 | 80 | 2018 |
A 3.8 mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure CH Chan, Y Zhu, SW Sin, U Seng-Pan, RP Martins 2012 Symposium on VLSI Circuits (VLSIC), 86-87, 2012 | 80 | 2012 |
Limit cycle oscillation reduction for digital low dropout regulators M Huang, Y Lu, SW Sin, U Seng-Pan, RP Martins, WH Ki IEEE Transactions on Circuits and Systems II: Express Briefs 63 (9), 903-907, 2016 | 76 | 2016 |
A 550- W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental ADC With 256 Clock Cycles in 65-nm CMOS B Wang, SW Sin, U Seng-Pan, F Maloberti, RP Martins IEEE Journal of Solid-State Circuits 54 (4), 1161-1172, 2019 | 74 | 2019 |
26.5 A 5.5 mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS CH Chan, Y Zhu, SW Sin, U Seng-Pan, RP Martins 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 71 | 2015 |
A 2.3 mW 10-bit 170 MS/s two-step binary-search assisted time-interleaved SAR ADC SS Wong, UF Chio, Y Zhu, SW Sin, U Seng-Pan, RP Martins IEEE journal of solid-state circuits 48 (8), 1783-1794, 2013 | 71 | 2013 |
On the design of a programmable-gain amplifier with built-in compact DC-offset cancellers for very low-voltage WLAN systems PI Mak, U Seng-Pan, RP Martins IEEE Transactions on Circuits and Systems I: Regular Papers 55 (2), 496-509, 2008 | 71 | 2008 |
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Modulator With Multirate Opamp Sharing L Qi, SW Sin, U Seng-Pan, F Maloberti, RP Martins IEEE Transactions on Circuits and Systems I: Regular Papers 64 (10), 2641-2654, 2017 | 57 | 2017 |
Design and experimental verification of a power effective flash-SAR subranging ADC UF Chio, HG Wei, Y Zhu, SW Sin, U Seng-Pan, RP Martins, F Maloberti IEEE Transactions on Circuits and Systems II: Express Briefs 57 (8), 607-611, 2010 | 57 | 2010 |