| x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors P Sewell, S Sarkar, S Owens, FZ Nardelli, MO Myreen Communications of the ACM 53 (7), 89-97, 2010 | 603 | 2010 |
| A better x86 memory model: x86-TSO S Owens, S Sarkar, P Sewell Theorem Proving in Higher Order Logics: 22nd International Conference …, 2009 | 502 | 2009 |
| Mathematizing C++ concurrency M Batty, S Owens, S Sarkar, P Sewell, T Weber ACM SIGPLAN Notices 46 (1), 55-66, 2011 | 496 | 2011 |
| Mathematizing C++ concurrency M Batty, S Owens, S Sarkar, P Sewell, T Weber ACM SIGPLAN Notices 46 (1), 55-66, 2011 | 496 | 2011 |
| Understanding POWER multiprocessors S Sarkar, P Sewell, J Alglave, L Maranget, D Williams Proceedings of the 32nd ACM SIGPLAN conference on Programming language …, 2011 | 355 | 2011 |
| The semantics of x86-CC multiprocessor machine code S Sarkar, P Sewell, FZ Nardelli, S Owens, T Ridge, T Braibant, ... ACM SIGPLAN Notices 44 (1), 379-391, 2009 | 215 | 2009 |
| Ott: Effective tool support for the working semanticist P Sewell, FZ Nardelli, S Owens, G Peskine, T Ridge, S Sarkar Journal of functional programming 20 (1), 71-122, 2010 | 209 | 2010 |
| Modelling the ARMv8 architecture, operationally: Concurrency and ISA S Flur, KE Gray, C Pulte, S Sarkar, A Sezgin, L Maranget, W Deacon, ... Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of …, 2016 | 205 | 2016 |
| Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8 C Pulte, S Flur, W Deacon, J French, S Sarkar, P Sewell Proceedings of the ACM on Programming Languages 2 (POPL), 1-29, 2017 | 202 | 2017 |
| Fences in weak memory models J Alglave, L Maranget, S Sarkar, P Sewell Computer Aided Verification: 22nd International Conference, CAV 2010 …, 2010 | 179 | 2010 |
| An axiomatic memory model for POWER multiprocessors S Mador-Haim, L Maranget, S Sarkar, K Memarian, J Alglave, S Owens, ... Computer Aided Verification: 24th International Conference, CAV 2012 …, 2012 | 162 | 2012 |
| The semantics of Power and ARM multiprocessor machine code J Alglave, A Fox, S Ishtiaq, MO Myreen, S Sarkar, P Sewell, FZ Nardelli Proceedings of the 4th workshop on Declarative aspects of multicore …, 2009 | 154 | 2009 |
| Litmus: Running tests against hardware J Alglave, L Maranget, S Sarkar, P Sewell International Conference on Tools and Algorithms for the Construction and …, 2011 | 153 | 2011 |
| Clarifying and compiling C/C++ concurrency: from C++ 11 to POWER M Batty, K Memarian, S Owens, S Sarkar, P Sewell ACM SIGPLAN Notices 47 (1), 509-520, 2012 | 144 | 2012 |
| Ott: Effective tool support for the working semanticist P Sewell, FZ Nardelli, S Owens, G Peskine, T Ridge, S Sarkar, R Strniša ACM SIGPLAN Notices 42 (9), 1-12, 2007 | 136 | 2007 |
| Synchronising c/c++ and power S Sarkar, K Memarian, S Owens, M Batty, P Sewell, L Maranget, J Alglave, ... Proceedings of the 33rd ACM SIGPLAN Conference on Programming Language …, 2012 | 132 | 2012 |
| A tutorial introduction to the ARM and POWER relaxed memory models L Maranget, S Sarkar, P Sewell Draft available from http://www. cl. cam. ac. uk/~ pes20/ppc-supplemental …, 2012 | 74 | 2012 |
| An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors KE Gray, G Kerneis, D Mulligan, C Pulte, S Sarkar, P Sewell Proceedings of the 48th International Symposium on Microarchitecture, 635-646, 2015 | 68 | 2015 |
| Mixed-size concurrency: ARM, Power, C/C++ 11, and SC S Flur, S Sarkar, C Pulte, K Nienhuis, L Maranget, KE Gray, A Sezgin, ... ACM SIGPLAN Notices 52 (1), 429-442, 2017 | 64 | 2017 |
| Foundational certified code in a metalogical framework K Crary, S Sarkar International Conference on Automated Deduction, 106-120, 2003 | 54 | 2003 |
Peter SewellComputer Laboratory, University of Cambridgeכתובת אימייל מאומתת בדומיין cl.cam.ac.uk
