עקוב אחר
Chris Chu
כותרת
צוטט על ידי
צוטט על ידי
שנה
FastPlace: Efficient analytical placement using cell shifting, iterative local refinement and a hybrid net model‏
N Viswanathan, CCN Chu‏
Proceedings of the 2004 international symposium on Physical design, 26-33, 2004‏
3842004
FLUTE: Fast lookup table based rectilinear Steiner minimal tree algorithm for VLSI design‏
C Chu, YC Wong‏
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007‏
3692007
Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation‏
CP Chen, CCN Chu, DF Wong‏
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided …, 1998‏
3501998
FastPlace 3.0: A fast multilevel quadratic placement algorithm with placement congestion control‏
N Viswanathan, M Pan, C Chu‏
2007 Asia and South Pacific Design Automation Conference, 135-140, 2007‏
2362007
An efficient and effective detailed placement algorithm‏
M Pan, N Viswanathan, C Chu‏
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005‏
2332005
FastRoute 4.0: Global router with efficient via minimization‏
Y Xu, Y Zhang, C Chu‏
2009 Asia and South Pacific Design Automation Conference, 576-581, 2009‏
2012009
FastRoute: A step to integrate global routing into placement‏
M Pan, C Chu‏
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006‏
1702006
A matrix synthesis approach to thermal placement‏
CCN Chu, DF Wong‏
Proceedings of the 1997 international symposium on Physical design, 163-168, 1997‏
1621997
FLUTE: Fast lookup table based wirelength estimation technique‏
C Chu‏
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004‏
1602004
FastRoute 2.0: A high-quality and efficient global router‏
M Pan, C Chu‏
2007 Asia and south pacific design automation conference, 250-255, 2007‏
1502007
Fitted Elmore delay: a simple and accurate interconnect delay model‏
AI Abou-Seido, B Nowak, C Chu‏
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (7), 691-696, 2004‏
1372004
Twin binary sequences: A non-redundant representation for general non-slicing floorplan‏
EFY Young, CCN Chu, C Shen‏
Proceedings of the 2002 international symposium on Physical design, 196-201, 2002‏
1152002
Fast and accurate rectilinear Steiner minimal tree algorithm for VLSI design‏
C Chu, YC Wong‏
Proceedings of the 2005 international symposium on Physical design, 28-35, 2005‏
1112005
IPR: An integrated placement and routing algorithm‏
M Pan, C Chu‏
Proceedings of the 44th Annual Design Automation Conference, 59-62, 2007‏
952007
RQL: Global placement via relaxed quadratic spreading and linearization‏
N Viswanathan, GJ Nam, CJ Alpert, P Villarrubia, H Ren, C Chu‏
Proceedings of the 44th annual Design Automation Conference, 453-458, 2007‏
942007
DeFer: Deferred Decision Making Enabled Fixed-Outline Floorplanning Algorithm‏
JZ Yan, C Chu‏
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010‏
932010
FOARS: FLUTE based obstacle-avoiding rectilinear Steiner tree construction‏
G Ajwani, C Chu, WK Mak‏
Proceedings of the 19th international symposium on Physical design, 27-34, 2010‏
842010
Efficient rectilinear Steiner tree construction with rectilinear blockages‏
Z Shen, CCN Chu, YM Li‏
2005 International Conference on Computer Design, 38-44, 2005‏
842005
Closed form solutions to simultaneous buffer insertion/sizing and wire sizing‏
C Chu, DF Wong‏
ACM Transactions on Design Automation of Electronic Systems (TODAES) 6 (3 …, 2001‏
812001
Closed form solution to simultaneous buffer insertion/sizing and wire sizing‏
CCN Chu, DF Wong‏
Proceedings of the 1997 international symposium on Physical design, 192-197, 1997‏
811997
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מאמרים 1–20