| Fabrication and characterization of metal-to-metal interconnect structures for 3-D integration A Huffman, J Lannon, M Lueck, C Gregory, D Temple Journal of Instrumentation 4 (03), P03006, 2009 | 60 | 2009 |
| Fabrication of TSV-based silicon interposers D Malta, E Vick, S Goodwin, C Gregory, M Lueck, A Huffman, D Temple 2010 IEEE International 3D Systems Integration Conference (3DIC), 1-6, 2010 | 59 | 2010 |
| Advancements in fabrication of glass interposers A Shorey, P Cochet, A Huffman, J Keech, M Lueck, S Pollard, K Ruhmer 2014 IEEE 64th Electronic Components and Technology Conference (ECTC), 20-25, 2014 | 55 | 2014 |
| High density interconnect at 10µm pitch with mechanically keyed Cu/Sn-Cu and Cu-Cu bonding for 3-D integration JD Reed, M Lueck, C Gregory, A Huffman, JM Lannon, D Temple 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC …, 2010 | 44 | 2010 |
| Fabrication and testing of a TSV-enabled Si interposer with Cu-and polymer-based multilevel metallization J Lannon, A Hilton, A Huffman, M Butler, D Malta, C Gregory, D Temple IEEE Transactions on Components, Packaging and Manufacturing Technology 4 (1 …, 2013 | 40 | 2013 |
| High density Cu-Cu interconnect bonding for 3-D integration J Lannon, C Gregory, M Lueck, A Huffman, D Temple 2009 59th Electronic Components and Technology Conference, 355-359, 2009 | 37 | 2009 |
| High-density large-area-array interconnects formed by low-temperature Cu/Sn–Cu bonding for three-dimensional integrated circuits MR Lueck, JD Reed, CW Gregory, A Huffman, JM Lannon, DS Temple IEEE Transactions on Electron Devices 59 (7), 1941-1947, 2012 | 36 | 2012 |
| Effects of assembly process parameters on the structure and thermal stability of Sn-capped Cu bump bonds A Huffman, M Lueck, C Bower, D Temple 2007 Proceedings 57th Electronic Components and Technology Conference, 1589-1596, 2007 | 35 | 2007 |
| Through glass vias (TGV) and aspects of reliability M Lueck, A Huffman, A Shorey 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 672-677, 2015 | 34 | 2015 |
| Large format resistive array (LFRA) infrared scene projector (IRSP) performance and production status J Oleson, J James, J LaVeigne, K Sparkman, G Matis, S McHugh, ... Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XI …, 2006 | 27 | 2006 |
| Nanoimprint lithography fabrication of waveguide-integrated optical gratings with inexpensive stamps S Grego, A Huffman, M Lueck, BR Stoner, J Lannon Microelectronic engineering 87 (10), 1846-1851, 2010 | 20 | 2010 |
| Fine-pitch wafer bumping and assembly for high density detector systems A Huffman, R LaBennett, S Bonafede, C Statler 2003 IEEE Nuclear Science Symposium. Conference Record (IEEE Cat. No …, 2003 | 20 | 2003 |
| Bonding for 3-D integration of heterogeneous technologies and materials D Temple, D Malta, JM Lannon, M Lueck, A Huffman, C Gregory, ... ECS Transactions 16 (8), 3, 2008 | 18 | 2008 |
| OASIS: cryogenically-optimized resistive arrays and IRSP subsystems for space-background IR simulation J James, P Bryant, S Solomon, J LaVeigne, G Matis, J Oleson, J Lannon, ... Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XI …, 2006 | 17 | 2006 |
| Issues with fine pitch bumping and assembly S Nangalia, P Deane, S Bonfede, A Huffman, C Statler, CL Rinne Proceedings International Symposium on Advanced Packaging Materials …, 2000 | 16 | 2000 |
| MIRAGE: Developments in IRSP system development, RIIC design, emitter fabrication, and performance P Bryant, J Oleson, J James, B Lindberg, J Lannon, D Vellenga, ... Technologies for Synthetic Environments: Hardware-in-the-Loop Testing IX …, 2004 | 15 | 2004 |
| Fully integrated AC coupled interconnect using buried bumps J Wilson, S Mick, J Xu, L Luo, S Bonafede, A Huffman, R LaBennett, ... IEEE transactions on advanced packaging 30 (2), 191-199, 2007 | 14 | 2007 |
| MIRAGE: developments in IRSP systems, RIIC design, emitter fabrication, and performance P Bryant, J Oleson, J James, S McHugh, J Lannon, D Vellenga, ... Technologies for Synthetic Environments: Hardware-in-the-Loop Testing X 5785 …, 2005 | 13 | 2005 |
| TSV-last, heterogeneous 3D integration of a SiGe BiCMOS beamformer and patch antenna for a W-band phased array radar D Malta, E Vick, M Lueck, A Huffman, S Woodruff, P Ralston, J Hartman, ... 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 1457-1464, 2016 | 12 | 2016 |
| Layer structure and thickness effects on electroplated AuSn solder bump composition S Bonafede, A Huffman, WD Palmer IEEE Transactions on Components and Packaging Technologies 29 (3), 604-609, 2006 | 12 | 2006 |
