| Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same AP Alur, SRS Boyapati, RA May, IA Salama, RL Sankman US Patent 10,163,798, 2018 | 51 | 2018 |
| Package with passivated interconnects SRS Boyapati, RN Manepalli, D Seneviratne, SV Pietambaram, ... US Patent 10,043,740, 2018 | 28 | 2018 |
| Laser cavity formation for embedded dies or components in substrate build-up layers C Zhang, SM Lotz, Q Zhang, SR Boyapati, N Sharma, IA Salama US Patent 9,202,803, 2015 | 26 | 2015 |
| Integration of embedded thin film capacitors in package substrates RL Sankman, DN Sobieski, SRS Boyapati US Patent 9,420,693, 2016 | 22 | 2016 |
| Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same AP Alur, SRS Boyapati, RA May, IA Salama, RL Sankman US Patent 10,707,168, 2020 | 16 | 2020 |
| Thin film barrier seed metallization in magnetic-plugged through hole inductor K Darmawikarta, S Pietambaram, S Gaan, SRS Boyapati, P Chatterjee, ... US Patent 11,443,885, 2022 | 12 | 2022 |
| In-package RF waveguides as high bandwidth chip-to-chip interconnects and methods for using the same A Aleksov, T Kamgaing, SRS Boyapati, K Darmawikarta, E Fayneh, ... US Patent 11,211,345, 2021 | 10 | 2021 |
| Microelectronic device with embedded die substrate on interposer RA May, IA Salama, SRS Boyapati, S Li, K Darmawikarta, RL Sankman, ... US Patent 11,430,740, 2022 | 9 | 2022 |
| Package substrates with integral devices RA May, KK Darmawikarta, SRS Boyapati US Patent 10,790,233, 2020 | 8 | 2020 |
| Electromigration resistant and profile consistent contact arrays S Pietambaram, JK Han, A Lehaf, S Cho, T Heaton, H Tanaka, ... US Patent 10,431,537, 2019 | 8 | 2019 |
| Inorganic interposer for multi-chip packaging D Sobieski, K Darmawikarta, SRS Boyapati, M Celikkol, KO Lee, K Aygun, ... US Patent 10,692,847, 2020 | 7 | 2020 |
| Enabling magnetic films in inductors integrated into semiconductor packages K Darmawikarta, S Pietambaram, P Chatterjee, SRS Boyapati, WL Jen US Patent 11,270,959, 2022 | 6 | 2022 |
| Integration of embedded thin film capacitors in package substrates RL Sankman, DN Sobieski, SRS Boyapati US Patent 9,941,054, 2018 | 6 | 2018 |
| Microelectronic structures including bridges B Nie, G Duan, OG Karhade, NA Deshpande, Y Deng, WL Jen, ... US Patent 11,923,307, 2024 | 5 | 2024 |
| Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling RA May, SRS Boyapati, KK Darmawikarta, SV Pietambaram, JS Gonzalez, ... US Patent 10,872,872, 2020 | 5 | 2020 |
| Surface finishes with low rBTV for fine and mixed bump pitch architectures K Darmawaikarta, R May, S Kandanur, SRS Boyapati, S Pietambaram, ... US Patent 11,488,918, 2022 | 4 | 2022 |
| Polarization defined zero misalignment vias for semiconductor packaging H Tanaka, A Aleksov, SRS Boyapati, RA May, K Darmawikarta US Patent 10,453,812, 2019 | 4 | 2019 |
| Patch accommodating embedded dies having different thicknesses S Pietambaram, RA May, K Darmawikarta, H Tanaka, RN Manepalli, ... US Patent 11,862,619, 2024 | 3 | 2024 |
| Faraday rotator interconnect as a through-via configuration in a patch architecture BC Marin, D Pratap, H Tanaka, N Deshpande, O Karhade, RA May, ... US Patent App. 17/122,340, 2022 | 3 | 2022 |
| Faraday rotator optical interconnects for optical insulator in semiconductor substrate packaging H Tanaka, BC Marin, K Darmawkarta, RA May, SRS Boyapati, ... US Patent App. 17/122,352, 2022 | 3 | 2022 |
R. Alan MayApplied MaterialsEmail verificata su amat.com
