Design of a 2.2-mW 24-Mb/s CMOS VLC receiver SoC with ambient light rejection and post-equalization for Li-Fi applications X Li, B Hussain, L Wang, J Jiang, CP Yue Journal of Lightwave Technology 36 (12), 2366-2375, 2018 | 49 | 2018 |
A 75-Mb/s RGB PAM-4 visible light communication transceiver system with pre-and post-equalization L Wang, X Wang, J Kang, CP Yue Journal of Lightwave Technology 39 (5), 1381-1390, 2021 | 34 | 2021 |
Out-of-plane designed soft metasurface for tunable surface plasmon polariton X Liu, Z Huang, C Zhu, L Wang, J Zang Nano Letters 18 (2), 1435-1441, 2018 | 30 | 2018 |
A 32-Gb/s 0.46-pJ/bit PAM4 CDR using a quarter-rate linear phase detector and a self-biased PLL-based multiphase clock generator Z Zhang, G Zhu, C Wang, L Wang, CP Yue IEEE Journal of Solid-State Circuits 55 (10), 2734-2746, 2020 | 23 | 2020 |
A W-band single-antenna FMCW radar transceiver with adaptive leakage cancellation M Kalantari, W Li, H Shirinabadi, A Fotowat-Ahmady, CP Yue IEEE Journal of Solid-State Circuits 56 (6), 1655-1667, 2020 | 18 | 2020 |
Simultaneous magnetic resonance wireless power and high-speed data transfer system with cascaded equalizer for variable channel compensation L Wang, X Li, S Raju, CP Yue IEEE Transactions on Power Electronics 34 (12), 11594-11604, 2019 | 17 | 2019 |
A 52-Gb/s Sub-1-pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects C Wang, L Wang, Z Zhang, MK Mahmoudabadi, W Shi, CP Yue IEEE Open Journal of Circuits and Systems 2, 46-55, 2021 | 14 | 2021 |
Mechanically tunable terahertz graphene plasmonics using soft metasurface L Wang, X Liu, J Zang 2D Materials 3 (4), 041007, 2016 | 12 | 2016 |
A low-power PAM4 receiver with an adaptive variable-gain rectifier-based decoder Q Pan, L Wang, X Luo, CP Yue IEEE Transactions on very large scale integration (VLSI) systems 28 (10 …, 2020 | 10 | 2020 |
A 2.2-mW 24-Mb/s CMOS LiFi receiver system-on-a-chip with ambient light rejection and post-equalization X Li, B Hussain, L Wang, J Jiang, CP Yue 2017 IEEE Photonics Conference (IPC), 29-30, 2017 | 7 | 2017 |
A RGB led PAM-4 visible light communication transmitter based on a system design with equalization X Wang, L Wang, K Jian, C Wang, CP Yue 2020 IEEE International Conference on Artificial Intelligence and Computer …, 2020 | 4 | 2020 |
A 24-30 GHz Cascaded QPLL Achieving 56.8-fs RMS Jitter and −248.6-dB FoMjitter L Wang, Z Liu, CP Yue 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 3 | 2023 |
Sensing and cancellation circuits for mitigating EMI-related common mode noise in high-speed PAM-4 transmitter R Azmat, L Wang, KQ Maqbool, C Wang, CP Yue IEEE Transactions on Circuits and Systems I: Regular Papers 68 (11), 4545-4555, 2021 | 3 | 2021 |
A 32-Gb/s 0.46-pJ/bit PAM4 CDR using a quarter-rate linear phase detector and a low-power multiphase clock generator Z Zhang, G Zhu, C Wang, L Wang, CP Yue 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 241-242, 2019 | 3 | 2019 |
Micro-LED with red-green-blue super-pixel integration for simultaneous display and optical near field communication X Liu, L Wang, C Zhang, C Liu, Z Lv, Z Liu, C Patrick Yue Optics Express 30 (14), 24889-24897, 2022 | 2 | 2022 |
Design of a real-time visible laser light communication system with basedband in FPGA for high definition video transmission J Kang, L Wang, CP Yue 2019 IEEE 8th Global Conference on Consumer Electronics (GCCE), 179-180, 2019 | 2 | 2019 |
A 20-24-GHz DPSSPLL with Charge-Domain Bandwidth Optimization Scheme Achieving 61.3-fs RMS Jitter and -253-dB FoMJitter L Wang, Z Liu, R Ma, CP Yue 2024 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2024 | 1 | 2024 |
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR L Wang, Z Zhang, C Wang, R Azmat, W Shi, CP Yue IEEE Journal of Solid-State Circuits, 2023 | 1 | 2023 |
An integrated system evaluation engine for cross-domain simulation and design optimization of high-speed 5G Millimeter-wave wireless SoCs W Shi, F Chen, X Liu, C Zhang, Z Liu, T Min, B Xu, L Wang, J Kang, ... 2021 IEEE 14th International Conference on ASIC (ASICON), 1-4, 2021 | 1 | 2021 |
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM4 Receiver with a-8-dB JTRAN 40-MHz 0.2-UIPP JTOL Clock and Data Recovery L Wang, Z Zhang, CP Yue 2021 Symposium on VLSI Circuits, 1-2, 2021 | 1 | 2021 |