Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits A Morgenshtein, A Fish, IA Wagner
IEEE transactions on very large scale integration (VLSI) systems 10 (5), 566-581, 2002
494 2002 Logic circuit and method of logic circuit design A Morgenshtein, A Fish, IA Wagner
US Patent 8,161,427, 2012
159 * 2012 Gate diffusion input (GDI) logic in standard CMOS nanoscale process A Morgenshtein, I Shwartz, A Fish
2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel …, 2010
133 2010 Full-swing gate diffusion input logic—case-study of low-power CLA adder design A Morgenshtein, V Yuzhaninov, A Kovshilovsky, A Fish
Integration 47 (1), 62-70, 2014
130 2014 Ion concentration transistor and dual-mode sensors A Morgenshtein, U Dinnar, Y Nemirovsky
US Patent 7,544,979, 2009
121 2009 Gate-diffusion input (GDI)-a technique for low power design of digital circuits: analysis and characterization A Morgenshtein, A Fish, IA Wagner
2002 IEEE International symposium on circuits and systems. Proceedings (Cat …, 2002
106 2002 Wheatstone-Bridge readout interface for ISFET/REFET applications A Morgenshtein, L Sudakov-Boreysha, U Dinnar, CG Jakobson, ...
Sensors and Actuators B: Chemical 98 (1), 18-27, 2004
94 2004 Gate-diffusion input (gdi)-a novel power efficient method for digital circuits: a design methodology A Morgenshtein, A Fish, A Wagner
Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No …, 2001
84 2001 CMOS readout circuitry for ISFET microsystems A Morgenshtein, L Sudakov-Boreysha, U Dinnar, CG Jakobson, ...
Sensors and Actuators B: Chemical 97 (1), 122-131, 2004
83 2004 An efficient implementation of D-Flip-Flop using the GDI technique A Morgenshtein, A Fish, IA Wagner
2004 IEEE international symposium on circuits and systems (IEEE Cat. No …, 2004
80 2004 Parallel vs. serial on-chip communication RR Dobkin, A Morgenshtein, A Kolodny, R Ginosar
Proceedings of the 2008 international workshop on System level interconnect …, 2008
72 2008 Comparative analysis of serial vs parallel links in NoC A Morgenshtein, I Cidon, A Kolodny, R Ginosar
2004 International Symposium on System-on-Chip, 2004. Proceedings., 185-188, 2004
69 2004 Automatic hardware-efficient SoC integration by QoS network on chip E Bolotin, A Morgenshtein, I Cidon, R Ginosar, A Kolodny
Proceedings of the 2004 11th IEEE International Conference on Electronics …, 2004
62 2004 Unified Logical Effort—A Method for Delay Evaluation and Minimization in Logic Paths With Interconnect A Morgenshtein, EG Friedman, R Ginosar, A Kolodny
IEEE transactions on very large scale integration (VLSI) systems 18 (5), 689-696, 2009
57 2009 Asynchronous gate-diffusion-input (GDI) circuits A Morgenshtein, M Moreinis, R Ginosar
IEEE transactions on very large scale integration (vlsi) systems 12 (8), 847-856, 2004
49 2004 Short-circuit power reduction by using high-threshold transistors A Morgenshtein
Journal of Low Power Electronics and Applications 2 (1), 69-78, 2012
22 2012 Logic circuit and method of logic circuit design A Morgenshtein, A Fish, IA Wagner
US Patent 7,716,625, 2010
22 2010 Low-leakage repeaters for NoC interconnects A Morgenshtein, I Cidon, A Kolodny, R Ginosar
2005 IEEE International Symposium on Circuits and Systems, 600-603, 2005
21 2005 Logic gates as repeaters (LGR) for area-efficient timing optimization M Moreinis, A Morgenshtein, IA Wagner, A Kolodny
IEEE transactions on very large scale integration (VLSI) systems 14 (11 …, 2006
18 2006 Design and methodology of ISFET (Ion sensitive field effect transistor) microsystems for bio-telemetry A Morgenshtein
Technion-Israel Institute of Technology, Department of Biomedical Engineering, 2003
16 2003