Method and system for controlling access to a communications medium A Philip, DR Pannell, S Pandey US Patent App. 15/904,382, 2019 | 13 | 2019 |
Transient errors resiliency analysis technique for automotive safety critical applications S Pandey, B Vermeulen 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014 | 13 | 2014 |
Performance aware on-chip communication synthesis and optimization for shared multi-bus based architecture S Pandey, M Glesner, M Mühlhäuser Proceedings of the 18th annual symposium on Integrated circuits and system …, 2005 | 13 | 2005 |
PHY transceiver with adaptive TX driver and method of operating thereof S Pandey US Patent 10,148,467, 2018 | 10 | 2018 |
Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraint S Pandey, M Glesner Proceedings of the 43rd annual Design Automation Conference, 663-668, 2006 | 10 | 2006 |
High level hardware/software communication estimation in shared memory architecture S Pandey, H Zimmer, M Glesner, M Muhlhauser 2005 IEEE International Symposium on Circuits and Systems, 37-40, 2005 | 10 | 2005 |
Fine-grained stream-policing mechanism for automotive ethernet switches N Concer, S Pandey, HGH Vermeulen US Patent 9,558,147, 2017 | 9 | 2017 |
On-chip communication topology synthesis for shared multi-bus based architecture S Pandey, M Glesner, M Muhlhauser International Conference on Field Programmable Logic and Applications, 2005 …, 2005 | 8 | 2005 |
Simultaneous on-chip bus synthesis and voltage scaling under random on-chip data traffic S Pandey, M Glesner IEEE transactions on very large scale integration (VLSI) systems 15 (10 …, 2007 | 7 | 2007 |
Electromagnetic emission detection, transceiver and system S Pandey, JPA Frambach US Patent 10,594,363, 2020 | 6 | 2020 |
On the necessity of combining coding with spacing and shielding for improving performance and power in very deep sub-micron interconnects T Murgan, PB Bacinschi, S Pandey, AG Ortiz, M Glesner International Workshop on Power and Timing Modeling, Optimization and …, 2007 | 6 | 2007 |
Energy Conscious Simultaneous Voltage Scaling and On-Chip Communication Bus Synthesis S Pandey, T Murgan, M Glesner 2006 IFIP International Conference on Very Large Scale Integration, 296-301, 2006 | 6 | 2006 |
Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique S Pandey, M Glesner 2006 IEEE International Symposium on Circuits and Systems, 4 pp., 2006 | 6 | 2006 |
Full duplex communication circuit and method therefor S Pandey, HGH Vermeulen, AK Deb US Patent 8,817,670, 2014 | 5 | 2014 |
Communications with adaptive equalization S Pandey, HGH Vermeulen, AK Deb US Patent 8,693,532, 2014 | 5 | 2014 |
Field Programmable Logic and Application: 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings J Becker, M Platzner, S Vernalde Springer Science & Business Media, 2004 | 5 | 2004 |
Communications apparatus, system and method with error mitigation AK Deb, HGH Vermeulen, S Pandey US Patent 8,817,810, 2014 | 4 | 2014 |
Communications device and method of communications S Pandey US Patent 11,637,743, 2023 | 3 | 2023 |
Method and apparatus for updating an encryption key S Pandey, P Polak US Patent 11,019,043, 2021 | 3 | 2021 |
System and method for bit processing in a central network component AK Deb, HGH Vermeulen, S Pandey US Patent 10,284,247, 2019 | 3 | 2019 |