| FPGA-based high-performance and scalable block LU decomposition architecture MK Jaiswal, N Chandrachoodan IEEE Transactions on Computers 61 (1), 60-72, 2011 | 72 | 2011 |
| GPU implementation of a programmable turbo decoder for software defined radio applications DRN Yoge, N Chandrachoodan 2012 25th International Conference on VLSI Design, 149-154, 2012 | 29 | 2012 |
| ViTA: A vision transformer inference accelerator for edge applications S Nag, G Datta, S Kundu, N Chandrachoodan, PA Beerel 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | 22 | 2023 |
| Adaptive negative cycle detection in dynamic graphs N Chandrachoodan, SS Bhattacharyya, KJR Liu ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 21 | 2001 |
| Implementation of a 30 ps resolution time to digital converter in FPGA R Narasimman, A Prabhakar, N Chandrachoodan 2015 International Conference on Electronic Design, Computer Networks …, 2015 | 18 | 2015 |
| A GPU implementation of belief propagation decoder for polar codes N Chandrachoodan 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals …, 2012 | 16 | 2012 |
| Probabilistic error modeling for two-part segmented approximate adders D Celia, V Vasudevan, N Chandrachoodan 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 15 | 2018 |
| Optimization with photonic wave-based annealers A Prabhakar, P Shah, U Gautham, V Natarajan, V Ramesh, ... Philosophical Transactions of the Royal Society A 381 (2241), 20210409, 2023 | 14 | 2023 |
| Optimizing power-accuracy trade-off in approximate adders D Celia, V Vasudevan, N Chandrachoodan 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 14 | 2018 |
| Efficient implementation of ieee double precision floating-point multiplier on fpga MK Jaiswal, N Chandrachoodan 2008 IEEE Region 10 and the Third international Conference on Industrial and …, 2008 | 13 | 2008 |
| DFT assisted techniques for peak launch-to-capture power reduction during launch-on-shift at-speed testing S Potluri, AS Trinadh, SB Ch, V Kamakoti, N Chandrachoodan ACM Transactions on Design Automation of Electronic Systems (TODAES) 21 (1 …, 2015 | 12 | 2015 |
| Algorithm and VLSI architecture for high performance adaptive video scaling A Raghupathy, N Chandrachoodan, KJR Liu IEEE transactions on multimedia 5 (4), 489-502, 2003 | 11 | 2003 |
| A simulation-based metric to guide glitch power reduction in digital circuits S Bathla, RM Rao, N Chandrachoodan IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (2), 376-386, 2018 | 9 | 2018 |
| The hierarchical timing pair model for multirate DSP applications N Chandrachoodan, SS Bhattacharyya, KJR Liu IEEE Transactions on Signal Processing 52 (5), 1209-1217, 2004 | 9 | 2004 |
| White mirror: Leaking sensitive information from interactive Netflix movies using encrypted traffic analysis G Mitra, PK Vairam, P Slpsk, N Chandrachoodan, K V Proceedings of the ACM SIGCOMM 2019 Conference Posters and Demos, 122-124, 2019 | 8 | 2019 |
| iitRACE: A memory efficient engine for fast incremental timing analysis and clock pessimism removal C Peddawad, A Goel, B Dheeraj, N Chandrachoodan 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 903-909, 2015 | 8 | 2015 |
| Layout-aware and programmable memory BIST synthesis for nanoscale system-on-chip designs A Kokrady, CP Ravikumar, N Chandrachoodan 2008 17th Asian Test Symposium, 351-356, 2008 | 8 | 2008 |
| An efficient timing model for hardware implementation of multirate dataflow graphs N Chandrachoodan, SS Bhattacharyaa, KJR Liu 2001 IEEE International Conference on Acoustics, Speech, and Signal …, 2001 | 8 | 2001 |
| EASpiNN: Effective automated spiking neural network evaluation on FPGA S Panchapakesan, Z Fang, N Chandrachoodan 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom …, 2020 | 7 | 2020 |
| Data subsetting: A data-centric approach to approximate computing Y Kim, S Venkataramani, N Chandrachoodan, A Raghunathan 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 576-581, 2019 | 7 | 2019 |
K. J. Ray LiuOrigin ResearchEmail verificata su ieee.org